ACCUMULATOR ECL Search Results

Contextual Info: SÊ G E C PLESSEY PRELIMINARY INFORMATION S E M I C O N D U C T O R S DS4079-1.4 MA12003 22 BIT PHASE ACCUMULATOR / SINE ROM FEATURES The MA12003 is a 22 bit phase accumulator /sine read only memory ROM ASIC, it is a 21 bit parallel TTL input device with

Contextual Info: Am29509/L509 Am29509/L509 1 2 x 1 2 Multiplier Accumulator ADVANCED INFORM ATIO N • • • Output register preload Three-state output control IMOX processing - ECL internal circuitry for - TTL I/O Uses two's complement or unsigned inputs and outputs

Contextual Info: SEMICONDUCTOR CORPORATION Preliminary Datasheet 155/622 Mhz 16 Channel PRBS VSC8109 Generator and Comparator. Features Multiple Length PRBS Generator With Adjustable M ark Ratios PRBS Error Detector and 16-bit Accumulator STS-192/STM-64 Selectable Frame Insertion

Contextual Info: ANALOG DEVICES 12*12-Bit CMOS Multiplier/Accumulator ADSP-1009 FEATURES 12 x 12-Bit Parallel Multiplication/Accumulation 150mW Power Dissipation with CMOS Technology 130ns Multiply/Accumulate Time Improved TDC1009J Second Source Available in 64-Pin Ceramic DIPs, or 68-Terminal

Contextual Info: ANALOG DEVICES FEATURES 8x 8-Bit CMOS Multiplier/Accumulator ADSP-1008A ADSP-1008A FUNCTIONAL BLOCK DIAGRAM 8 x 8-Bit Parallel Multiplication/Accumulation lOOmW Power Dissipation with TTL-Compatible 1.S Micron C M O S Technology 55ns Multipiy/Accumulate Time

motorola hc12

Abstract: hc11 HC12 timer of motorola hc12 motorola hc11 HC12 Family HC12S HCS12 HC12-instruction HCS12 microcontroller
Contextual Info: Freescale Semiconductor, Inc. Engineering Bulletin EB611/D 7/2003 Freescale Semiconductor, Inc. HC11 and HC12 Families’ Pulse Accumulator By Darci Ernst Systems Engineering Austin, TX Introduction and Background The timer module is one of the peripherals found on Motorola’s HC12 Family of

AD9950

Contextual Info: ANALOG DEVICES □ 32-Bit 300 MSPS Phase Accumulator for DDS AD9950 FEATURES 300 MSPS Clock Rate 32-Bit Frequency Resolution Low Power: 1.5 W On-Board Quad Logic 16- or 32-Bit Bus Compatible Frequency control signals are T T L compatible, and the internal

DESIGN AND IMPLEMENTATION OF PRBS GENERATOR

Abstract: ecl accumulator 004II
Contextual Info: Preliminary Datasheet 155/622 Mhz 16 Channel p r b s VSC8109 Generator and Comparator. Features Multiple Length PRBS Generator With Adjustable M ark Ratios PRBS Error Detector and 16-bit Accumulator STS-192/STM-64 Selectable Frame Insertion 16 Bit Static and Selectable Divider Output

AD9950

Contextual Info: ANALOG DEVICES □ 32-Bit, 300 MSPS Phase Accumulator for DOS AD9950 FEATURES 300 MSPS Clock Rate 32-Bit Frequency Resolution Low Power: 1.5 W On-Board Quad Logic 16- or 32-Bit Bus Compatible Frequency control signals are T T L compatible, and the internal

Q20-Q29

Abstract: 10G102-3X 10G102 10G102-3C1 10G103 10G103-3C1 10G103-3X sine cosine phase quadrant look-up address Gigabit Logic
Contextual Info: 10G102 10G103 /GBLiGigaBit Logic 32-Bit DDS Phase Accumulator 1 GHz Clock Rate 10G PicoLogic Family FEATURES 1 GHz typical clock frequency -2 version 18 ns freq. switching time @1GHz 32-Bit frequency resolution 12-Bit parallel output TTL levels for Data and LDSTR inputs

DA1225A

Abstract: diode SD1 03c
Contextual Info: Ic M ACTM2 Field Programmable Gate Arrays Features • Up to 8000 Gate Array Gates 20,000 PLD equivalent gates Datapath Performance at 105 MHz • Replaces up to 200 TTL Packages 16-Bit Accumulator Performance to 39 MHz • Replaces up to eighty 20-Pin PAL Packages

29l50

Abstract: TDC1009 L509 AM29520
Contextual Info: 60S1/60S6ZUJV A m 2 9 5 0 9 /L 5 0 9 1 2 x 1 2 Multiplier Accumulator ADVANCED INFORM ATIO N Uses tw o 's com plem ent or unsigned inputs and outputs Round control 27-bit product accum ulation result - 24-bit product - 3-bit extended product O utput register preload

STK 5333 s

Abstract: 1838 ir receiver b 010 22 05 feme MC68HC11KA4 STK 407 040 stk 4192 II 009C MC68HC711KA4
Contextual Info: MC68HC11KA4RG/AD MC68HC11KA4 MC68HC711KA4 PROGRAMMING REFERENCE GUIDE M m o t o r o l a Block Diagram PAI/0C1 PULSE ACCUMULATOR OC2/OC1 0C3/0C1 OC4/OC1 IC4/OC5/OC1 ICI IC2 IC3 P B 7 -< -> PB6 P B 5 < -> j m PB4 PB3 P B 2< -> 1 PB1 PBO ADDR15 ADDR14 ADDR13

A02E transistor

Abstract: 176-CPGA A1225A 100VQFP four channel decoder A1225 A1240A A1280 A1280A VKS FPGA CQFP 172
Contextual Info: Æ â C ti f A C r M2 Field Programmable Gate Arrays Features • Up to 8000 Gate Array Gates 20,000 PLD equivalent gates Datapath Performance at 105 MHz 16-Bit Accumulator Performance to 39 MHz • Replaces up to 200 TTL Packages • Replaces up to eighty 20-Pin PAL Packages

Contextual Info: TEKTRONIX INC/ TRI Û U I N T 2bE D B ÔTDbSlû 0000471 p-»- . / C m / G ig a B it L o g ic 1 HTRâ 10G102 10G103 32-Bit DDS Phase Accumulator 1 GHz Clock Rate _ 10G PicoLogic Family_ FEA TU R ES • • • • • • • 1 G H z typical clock frequency -2 version

"Bipolar Integrated Technology"

Abstract: TIS14 B3011 41BIT B-3011 ecl accumulator "Overflow detection"
Contextual Info: Sill: Bipolar Integrated Technology. Inc. B3011 ECL 16x16 Bit Fixed-Point Multiplier-Accum ulator IDESCRIPTION IFEATURES • 11 ns nominal clocked multiply-accumulate time ■ Dual 40-bit accumulators and dual input registers for complex arithmetic and double precision pipelines

la 4507

Abstract: P06P03 43BJ ST1302 g3328 Am29434
Contextual Info: ADVANCED MICRO 0257525 DEVICES M d F | D5S7SHS ADVANCED MI CRO D E V I C E S 8 9 D OOEM^S 7 D p .lfS ’01 24935 Am29423 a 10K-ECL 32-Bit Parallel Multiplier ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS 32-Blt Three-Bus Architecture Registers can be made transparent

HJD 228

Abstract: D2575 AM29434 BD005 t14x3 dSMC WF-023 ecl pal 16 macrocells Advanced Micro Devices comparators P2102
Contextual Info: ADVANCED MICRO D E V I C E S d F | o 5 S 7 5 HS DOEMTBS 7 0257525 ADVANCED MICRO DEVICES 89D 24935 D f-LfS’Ol a Am 29423 10K-ECL 32-Bit Parallel Multiplier ADVANCE INFORMATION > 3 DISTINCTIVE CHARACTERISTICS 32-Blt Three-Bus Architecture - The device has tw o 32-bit Input ports and one 32-btt

Contextual Info: GEC PLESSEY 1 S E M I C O N D U C T O R~S~] PRELIMINARY INFORMATION SP2001 100MHz DIRECT DIGITAL FREQUENCY SYNTHESISER Supersedes January 1991 Edition The SP2001 Direct Frequency Synthesiser (DFS) is an ECL100K compatible 'numerically controlled oscillator' i.e. it

Contextual Info: GEC PLESSEY [ s e m i c o n d u c t o r s PRELIMINARY INFORMATION 1 SP2001 100MHz DIRECT DIGITAL FREQUENCY SYNTHESISER Supersedes January 1991 Edition The SP2001 Direct Frequency Synthesiser (DFS) is an ECL100K compatible ‘numerically controlled oscillator' i.e. it

TIM16B4C

Abstract: S12TIM16B4CV1
Contextual Info: Freescale Semiconductor, Inc. DOCUMENT NUMBER S12TIM16B4CV1/D Freescale Semiconductor, Inc. TIM_16B4C Block Guide V1.0 Original Release Date: 09 Nov 2001 Revised: 07 Dec 2001 8/16 Bit Division, TSPG, Austin Motorola, Inc Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola

ECT_16B8C Block User Guide

Abstract: ECT16B8C pa3h Register HCS12 SH15 ECT_16B8C ECT Block User Guide
Contextual Info: DOCUMENT NUMBER S12ECT16B8CV2/D ECT_16B8C Block User Guide V02.03 Original Release Date: 2-Sep-1999 Revised: Aug 12, 2004 Motorola Inc. Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or

accumulator 1GHz

Contextual Info: jm /S The NCO as a Stable, Accurate Synthesizer Sem iconductor I T e c h n ic a l B r i e l M a y 1998 T B 3 1 8 .1 Low Jitter Frequency Reference In communication and other circuits, it is often necessary to produce an accurate reference signal whose frequency and

Three phase sine wave oscillator

Abstract: TB318 HSP45106 HSP45116
Contextual Info: The NCO as a Stable, Accurate Synthesizer Technical Brief May 1998 TB318.1 Low Jitter Frequency Reference In communication and other circuits, it is often necessary to produce an accurate reference signal whose frequency and phase can be precisely controlled in real time. The Numerically Controlled Oscillator NCO is ideally suited for this purpose. For some applications, the output reference signal is a