AD95XX Search Results

max9291

Abstract: AD6643-200 CP-64-4 901MH AN83-5 10-com 1401M 10True
Contextual Info: Dual IF Receiver AD6643 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD AD6643 VIN+A VIN–A PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 VCM VIN+B VIN–B PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 DATA MULTIPLEXER AND LVDS DRIVERS DCO± D0±

E19 CORE TRANSFORMER

Abstract: CP-48-1 AD9524
Contextual Info: 80 MHz Bandwidth, Dual IF Receiver AD6673 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B SYSREF± SYNCINB± CLK± RFCLK PIPELINE 11-BIT ADC HIGH

AD9250

Abstract: E19 CORE TRANSFORMER AD9524 upstream docsis cmts JESD204B
Contextual Info: 14-Bit, 170 MSPS/250 MSPS, JESD204B, Dual Analog-to-Digital Converter AD9250 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM DVDD AGND DGND DRGND AD9250 VIN+A VIN–A PIPELINE 14-BIT ADC VCM VIN+B VIN–B PIPELINE 14-BIT ADC JESD-204B INTERFACE SERDOUT0± CML, TX

max8895

Abstract: AD9613BCPZ-250
Contextual Info: FEATURES SNR = 69.6 dBFS at 185 MHz fIN and 250 MSPS SFDR = 86 dBc at 185 MHz fIN and 250 MSPS −149.9 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 770 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

circuit diagram of analog clock using logic gates

Contextual Info: FEATURES SNR = 70.6 dBFS at 185 MHz AIN and 250 MSPS SFDR = 85 dBc at 185 MHz AIN and 250 MSPS −151.6 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 785 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

AN-877

Abstract: ad9524
Contextual Info: IF Diversity Receiver AD6649 FEATURES APPLICATIONS SNR = 73.0 dBFS in a 95 MHz bandwidth at 185 MHz AIN and 245.76 MSPS SFDR = 85 dBc at 185 MHz AIN and 250 MSPS Noise density = −151.2 dBFS/Hz input at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 1 W with fixed-frequency NCO,

AN-877 ANALOG DEVICES

Contextual Info: Dual IF Receiver AD6643 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD AD6643 VIN+A VIN–A PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 VCM VIN+B VIN–B PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 DATA MULTIPLEXER AND LVDS DRIVERS DCO± D0± D10± OEB

Contextual Info: 80 MHz Bandwidth, Dual IF Receiver AD6673 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B PIPELINE 11-BIT ADC HIGH SPEED SERIALIZERS CLOCK GENERATION

Contextual Info: 16-Bit, 310 MSPS, 3.3 V/1.8 V Dual Analog-to-Digital Converter ADC AD9652 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD3 AVDD SDIO SCLK CSB DRVDD SPI AD9652 OR+, OR– PROGRAMMING DATA VIN+A DDR DATA INTERLEAVER LVDS OUTPUT DRIVER ADC VIN–A VREF SENSE

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM SNR = 71.0 dBFS at 185 MHz AIN and 250 MSPS SFDR = 83 dBc at 185 MHz AIN and 250 MSPS −152.0 dBFS/Hz input noise at 200 MHz, −1 dBFS AIN, 250 MSPS Total power consumption: 390 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

Contextual Info: 1.65 GHz Clock Fanout Buffer with Output Dividers and Delay Adjust AD9508 Data Sheet FUNCTIONAL BLOCK DIAGRAM 1.65 GHz differential clock inputs/outputs 10-bit programmable dividers, 1 to 1024, all integers Up to 4 differential outputs or 8 CMOS outputs Pin strapping capability for hardwired programming at

Contextual Info: Wideband IF Receiver Subsystem AD6676 Data Sheet FEATURES APPLICATIONS High instantaneous dynamic range Noise figure NF as low as 13 dB Noise spectral density (NSD) as low as −159 dBFS/Hz IIP3 up to 36.9 dBm with spurious tones <−99 dBFS Tunable band-pass Σ-Δ analog-to-digital converter (ADC)

Contextual Info: 1.65 GHz Clock Fanout Buffer with Output Dividers and Delay Adjust AD9508 Data Sheet FUNCTIONAL BLOCK DIAGRAM 1.65 GHz differential clock inputs/outputs 10-bit programmable dividers, 1 to 1024, all integers Up to 4 differential outputs or 8 CMOS outputs Pin strapping capability for hardwired programming at

CP-32-12

Contextual Info: 14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter ADC AD9642 FUNCTIONAL BLOCK DIAGRAM FEATURES AVDD VIN+ PIPELINE 14-BIT ADC VIN– VCM AGND DRVDD D0±/D1± 14 PARALLEL DDR LVDS AND DRIVERS AD9642 D12±/D13± DCO± REFERENCE 1-TO-8 CLOCK

Contextual Info: Quad Input Multiservice Line Card Adaptive Clock Translator with Frame Sync AD9558 Data Sheet FEATURES Pin program function for easy frequency translation configuration Software controlled power-down 64-lead, 9 mm x 9 mm, LFCSP package Supports GR-1244 Stratum 3 stability in holdover mode

Contextual Info: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9634 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD VIN+ PIPELINE 12-BIT ADC VIN– VCM AGND DRVDD 12 D0±/D1± PARALLEL DDR LVDS AND DRIVERS AD9634 REFERENCE . . . D10±/D11± DCO± OR± 1-TO-8

Contextual Info: 14-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter AD9255 FEATURES APPLICATIONS SNR = 78.3 dBFS @ 70 MHz and 125 MSPS SFDR = 93 dBc @ 70 MHz and 125 MSPS Low power: 371 mW @ 125 MSPS 1.8 V analog supply operation 1.8 V CMOS or LVDS output supply

Contextual Info: 16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter AD9265 FEATURES PRODUCT HIGHLIGHTS SNR = 79.0 dBFS @ 70 MHz and 125 MSPS SFDR = 93 dBc @ 70 MHz and 125 MSPS Low power: 373 mW @ 125 MSPS 1.8 V analog supply operation 1.8 V CMOS or LVDS output supply

Arduino Mega2560

Abstract: 13001 S 6D TRANSISTOR arduino uno rev 3 agilent optical encoder 9988 MZ 13001 TRANSISTOR arduino mega 2650 skiip 613 gb 123 ct arduino sound sensor module pic arduino nano mc34063l
Contextual Info: ND3% BASE1 XXXX2108-0010-1-P 10 TSQ: 3001 CMS: CMS-USM TS host OP: NN COMP: 15-07-11 Hour: 13:07 TS:TS date TS time MCUS, MPUS, DSPS & DEVELOPMENT TOOLS Find Datasheets Online 8-BIT MCUS & DEVELOPMENT TOOLS 1 PSoC 3 DEVELOPMENT KITS ARDUINO MCU DEVLOPMENT PLATFORM

AD9558

Abstract: 0x0e02
Contextual Info: Quad Input Multiservice Line Card Adaptive Clock Translator with Frame Sync AD9558 Data Sheet FEATURES Pin program function for easy frequency translation configuration Software controlled power-down 64-lead, 9 mm x 9 mm, LFCSP package Supports GR-1244 Stratum 3 stability in holdover mode

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM SNR = 70.6 dBFS at 185 MHz AIN and 250 MSPS SFDR = 85 dBc at 185 MHz AIN and 250 MSPS −151.6 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 785 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

max8895

Abstract: PAGE31 AN501
Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM SNR = 69.6 dBFS at 185 MHz fIN and 250 MSPS SFDR = 86 dBc at 185 MHz fIN and 250 MSPS −149.9 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 770 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

LTE bandpass filter

Abstract: 968dB
Contextual Info: 14-Bit, 80 MSPS/155 MSPS, 1.8 V Serial Output Analog-to-Digital Converter ADC AD9641 Data Sheet FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM AVDD SDIO SCLK CSB DRVDD SPI AD9641 PROGRAMMING DATA DATA SERIALIZER, ENCODER, AND CML DRIVERS VIN+ ADC VIN–

nsd 102

Contextual Info: 16-Bit, 310 MSPS, 3.3 V/1.8 V Dual Analog-to-Digital Converter ADC AD9652 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD3 AVDD SDIO SCLK CSB DRVDD SPI AD9652 OR+, OR– PROGRAMMING DATA VIN+A DDR DATA INTERLEAVER LVDS OUTPUT DRIVER ADC VIN–A VREF SENSE