ADR4550 Search Results

ADR4525ARZ

Abstract: adr3450 ADR4533BRZ
Contextual Info: Ultralow Noise, High Accuracy Voltage References ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 FEATURES PIN CONFIGURATION ADR4520/ADR4525/ ADR4530/ADR4533/ ADR4540/ADR4550 Maximum temperature coefficient TCVOUT : 2 ppm/°C Output noise (0.1 Hz to 10 Hz)

Contextual Info: Ultralow Noise, High Accuracy Voltage References ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 FEATURES PIN CONFIGURATION ADR4520/ADR4525/ ADR4530/ADR4533/ ADR4540/ADR4550 Maximum temperature coefficient TCVOUT : 2 ppm/°C Output noise (0.1 Hz to 10 Hz)

AD8675

Abstract: ada4004-1
Contextual Info: FEATURES Single 20-bit voltage output DAC, ±2 LSB INL 8 nV/√Hz output noise spectral density 0.1 LSB long-term linearity error stability ±0.018 ppm/°C gain error temperature coefficient 2.5 µs output voltage settling time 3.5 nV-sec midscale glitch impulse

CN0314

Contextual Info: Circuit Note CN-0314 Devices Connected/Referenced Circuits from the Lab reference designs are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0314.

Contextual Info: 18-Bit, 5 MSPS PulSAR Differential ADC AD7960 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS REFIN VDD1 VDD2 VIO EN0 EN1 ÷2 CLOCK LOGIC EN2 EN3 IN+ CAP DAC IN– CNV+, CNV– D+, D– SERIAL LVDS SAR AD7960 DCO+, DCO– CLK+, CLK– GND Figure 1.

Contextual Info: System Ready, 20-Bit, ±2LSB INL, Voltage Output DAC AD5790 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VCC VDD VREFP A1 IOVCC 6.8kΩ 6.8kΩ R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 DAC REG 20 20-BIT DAC VOUT 6kΩ LDAC

Contextual Info: 18-Bit, 5 MSPS PulSAR Differential ADC AD7960 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS REFIN VIO EN0 EN1 ÷2 CLOCK LOGIC EN2 EN3 IN+ CAP DAC IN– CNV+, CNV– D+, D– SERIAL LVDS SAR AD7960 DCO+, DCO– CLK+, CLK– GND Figure 1. GENERAL DESCRIPTION

Contextual Info: System Ready, 18-Bit ±1 LSB INL, Voltage Output DAC AD5780 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VCC SDIN SYNC SDO VREFP AD5780 IOVCC SCLK VDD A1 CLR RFB INV INPUT SHIFT REGISTER AND CONTROL LOGIC 18 18 DAC REG 18-BIT DAC VOUT 6kΩ LDAC RESET R1 RFB

ADR512

Abstract: AD7804
Contextual Info: Precision Voltage References Quick Selection Guide Series Mode Precision Voltage References Shunt Mode Precision Voltage References Low Power AD589 ISY < 100 𝛍A ADR291/ADR292/ADR293 15 ␮A REF191/REF192/REF193/REF194/ REF195/REF196/REF198 45 ␮A AD1582/AD1583/AD1584/AD1585

Contextual Info: Circuit Note CN-0289 Devices Connected/Referenced Circuits from the Lab reference circuits are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0289.

Contextual Info: AN-1279 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com How to Oversample 5 MSPS, 18-Bit/16-Bit Precision SAR Converters to Increase Dynamic Range by Maithil Pachchigar

cn-0191

Contextual Info: 1 ppm 20-Bit, ±1 LSB INL, Voltage Output DAC AD5791 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VDD VCC VREFPF VREFPS AD5791 IOVCC A1 6.8kΩ 6.8kΩ R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 DAC REG 20 20-BIT DAC VOUT 6kΩ

Contextual Info: 16-Bit, 5 MSPS PulSAR Differential ADC AD7961 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Digital imaging systems Digital X-rays Computed tomography IR cameras MRI gradient control High speed data acquisition Spectroscopy Test equipment REFIN

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM REGCAP Fast throughput rate of 1 MSPS Specified for VDD of 2.7 V to 5.25 V Logic voltage VDRIVE of 1.65 V to 5.25 V INL of ±1 LSB maximum Analog input range of 0 V to VREF Ultralow power 349 µA typical at 3 V and 1 MSPS

Contextual Info: 18-Bit, 5 MSPS PulSAR Differential ADC AD7960 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS REFIN VIO EN0 EN1 ÷2 CLOCK LOGIC EN2 EN3 IN+ CAP DAC IN– CNV+, CNV– D+, D– SERIAL LVDS SAR AD7960 DCO+, DCO– CLK+, CLK– GND Figure 1. GENERAL DESCRIPTION

Contextual Info: 24-Bit, 250 kSPS Sigma-Delta ADC with 20 µs Settling AD7176-2 Data Sheet FEATURES GENERAL DESCRIPTION Fast and flexible output rate—5 SPS to 250 kSPS Fast settling time—20 µs Channel scan data rate of 50 kSPS/channel Performance specifications 17 noise free bits at 250 kSPS

Contextual Info: System Ready, 18-Bit ±1 LSB INL, Voltage Output DAC AD5780 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VCC SDIN SYNC SDO VREFP AD5780 IOVCC SCLK VDD A1 CLR RFB INV INPUT SHIFT REGISTER AND CONTROL LOGIC 18 18 DAC REG 18-BIT DAC VOUT 6kΩ LDAC RESET R1 RFB

Contextual Info: FEATURES Single 20-bit voltage output DAC, ±2 LSB INL 8 nV/√Hz output noise spectral density 0.1 LSB long-term linearity error stability ±0.018 ppm/°C gain error temperature coefficient 2.5 µs output voltage settling time 3.5 nV-sec midscale glitch impulse

CN-0321

Contextual Info: Circuit Note CN-0321 Devices Connected/Referenced AD5422 AD5700-1 Circuits from the Lab reference circuits are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0321.

Contextual Info: 12-/14-Bit High Bandwidth Multiplying DACs with Serial Interface AD5444/AD5446 Data Sheet FEATURES GENERAL DESCRIPTION 12 MHz multiplying bandwidth INL of ± 0.5 LSB at 12 bits Pin-compatible 12-/14-bit current output DAC 2.5 V to 5.5 V supply operation 10-lead MSOP package

Contextual Info: Dual Pseudo Differential 16-Bit, 1 MSPS PulSAR ADC 12.0 mW in QSOP AD7902 Data Sheet FEATURES GENERAL DESCRIPTION 16-bit resolution with no missing codes Throughput: 1 MSPS Low power dissipation 7.0 mW at 1 MSPS VDD1 and VDD2 only 12.0 mW at 1 MSPS (total)

cp245

Abstract: True 18-Bit, Voltage Output DAC AD57801
Contextual Info: System Ready, 18-Bit ±1 LSB INL, Voltage Output DAC AD5780 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VCC SDIN SYNC SDO VREFP AD5780 IOVCC SCLK VDD A1 CLR RFB INV INPUT SHIFT REGISTER AND CONTROL LOGIC 18 18 DAC REG 18-BIT DAC VOUT 6kΩ LDAC RESET R1 RFB

SMD A06 AMPLIFIER

Abstract: 1206-01 940-6140 FEC 498-737
Contextual Info: Evaluation Board User Guide UG-256 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for a 18-Bit Serial Input, Voltage Output DAC with Integrated Precision Reference Buffer Amplifiers

Contextual Info: TECHNICAL ARTICLE Applications Engineer, Analog Devices, Inc. | Share on Twitter | Share on LinkedIn | Email Have you worked with any ADC Δ-Σ or SAR and run it in an oversampling mode? Did you get the expected results? Did you encounter any problems? In some previous articles general overviews of Δ-Σ and SAR (successive