ADRU Search Results

SL10100

Abstract: SL80
Contextual Info: O K I Semiconductor M S M 5 1 V 4 2 6 0 /S L _ 262,144-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION T he M SM 51V4260/SL is a 262,144-word x 16-bit d ynam ic R A M fabricated in O K I's C M O S silicon gate technology. The M SM 51V4260/SL achieves high integration, high-speed operation, and lowpow er consum ption due to qu adruple polysilicon single m etal C M O S . The M SM 51V4260/SL is

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74AHCT32 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-OR GAT ES ̈ DESCRI PT I ON The U74AHCT32 contains four independent 2-input OR gates. Each gate provides the function Y=A+B in positive logic. ̈ FEAT U RES * Inputs Are TTL-Voltage Compatible

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74AHCT02 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-N OR GAT ES ̈ DESCRI PT I ON The U74AHCT02 contains four independent 2-input NOR gates. Each gate provides the function Y=A+B in positive logic. ̈ FEAT U RES * Inputs Are TTL-Voltage Compatible

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74AHC08 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-AN D GAT ES ̈ DESCRI PT I ON The U74AHC08 is ADRUPLE 2-INPUT POSITIVE-AND GATES. Which provides the Function Y=A*B. ̈ FEAT U RES * Operation voltage range: 2~5.5V * Max tPD of 7.9 ns at 5 V

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74AC00 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-N AN D GAT ES ̈ DESCRI PT I ON The UTC U74AC00 contains four independent 2-input NAND gates, and those gates perform the Boolean function of Y = A x B or Y = A + B in positive logic.

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74AHCT00 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-N AN D GAT E ̈ DESCRI PT I ON The U74AHCT00 is a adruple 2-input NAND gate which performs the function Y=A*B or Y=A + B . SOP-14 ̈ FEAT U RES * Low Power Dissipation: ICC = 2.0 A Max.

54ACS00

Contextual Info: UT54ACS00/UT54ACTS00 R adiation-H ardened Q u adruple 2 -Input NAND G ates FEA TU R ES P IN O U T S 14-P in D IP • 1.2ji radiation-hardened C M O S - Latchup im m une T op View • H igh speed • Low p o w er consum ption • Single 5 volt supply Al C 1

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74AHC00 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-N AN D GAT ES ̈ DESCRI PT I ON The U74AHC00 is ADRUPLE 2-INPUT POSITIVE-NAND GATES. Which provides the function Y=A*B . ̈ FEAT U RES * Operation voltage range: 2~5.5V * Max tPd of 6.5 ns at 5 V

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74LVC125A CMOS IC QU ADRU PLE BU S BU FFER GAT E WI T H 3 -ST AT E OU T PU T S ̈ DESCRI PT I ON The U74LVC125A consists of four bus buffers with 3-state output , when is high, the output is controlled by enable input disable.

54HC132

Contextual Info: — . . SN54HC132, SN74HC132 P R I O R I T Y u ADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS034C - DECEMBlER 1982 - REVISED MAY 19 9 7 • • • • • SN 54HC132 . . . J O R W PACKAGE SN74HC132 • v 'D i D 8 . 0 R N P A C K A G E /TT O P V !E \W

AN6912

Abstract: AN6912S ANS912
Contextual Info: A N 6912, AN6912S COMPARATORS AN691 2, AN6912S T adruple C om parators 11 <E 2<r 3<E 4<r 5<r 6<r , . • O utline T h e AN6912 and the AN6912S a re q u adruple voltage c o m p a ra to rs w ith w ide ra n g e of o p e ratin g supply voltages. ■ U n i t ' mm

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74CBT3126 Preliminary CMOS IC QU ADRU PLE FET BU S SWI T CH ̈ DESCRI PT I ON The U74CBT3126 is a adruple line bus switch. It is composed of four 1-bit line switchs with independent separate output-enable OE inputs. When OE is low, the switch is disabled.

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74AHCT08 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-AN D GAT E ̈ DESCRI PT I ON The U74AHCT08 is a adruple 2-input AND gate which performs the function Y=A*B or Y=A + B . ̈ * Low Power Dissipation: * High Speed: * High Noise Immunity

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74AHC32 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-OR GAT ES ̈ DESCRI PT I ON The UTC U74AHC32 are adruple 2-input positive-or gates which provides the function Y=A+B in positive logic. ̈ FEAT U RES * Operate from 2V to 5.5V

hef4011

Abstract: HEF4011BP HEF4011BD
Contextual Info: HEF4011B gates ADRUPLE 2-INPUT NAND GATE: The H E F 4 0 1 1B provides th e positive q u adruple 2 -in p u t N A N D fu n c tio n . The o u tp u ts are fu lly bu ffere d fo r highest noise im m u n ity and p a ttern in se n sitivity o f o u tp u t impedance.

CXD1088AQ

Abstract: cxd1088
Contextual Info: CXD1088AQ S O N Y Over Sampling Digital Filter LSI Package Outline Description C X D 1 0 8 8 A Q is a digital filter L S I w ith q u adru p led sam p lin g rate, d evelop ed for co m ­ pact d isc player. Unit: mm 44 pin QFP Features • 83rd and 21st order filters linked through ca s­

ALS86

Abstract: SN54ALS86 SN74ALS86 14C3-B
Contextual Info: -r V !Ô *V, S N 5 4 A LS 8 6 , S N 7 4 A LS 8 6 , S N 5 4 A S 8 6 , S N 7 4 A S 8 6 QU ADRU PLE 2 IN PU T EXC LU SIVE-O R G A T E S D 2 6 6 1 , A P R IL 1 9 8 2 - R E V I S E D M A Y 1 9 8 6 • • S N 5 4 A L S 8 6 , S N 5 4 A S 8 6 . . . J PACKAGE S N 7 4 A L S 8 6 , S N 7 4 A S 8 6 . . . D OR N PACKAGE

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74HC02 CMOS IC H CQU ADRU PLE 2 -I N PU T N OR GAT ES ̈ DESCRI PT I ON The U74HC02 contains four independent 2-input NOR gates, which provides the Function Y=A+B in positive logic. ̈ FEAT U RES * Operation voltage range: * Low Quiescent Current:

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74HC32 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-OR GAT ES ̈ DESCRI PT I ON The UTC U74HC32 devices contain four independent 2-input OR gates. They perform the Boolean function Y = • or Y = A + B in positive logic. ̈ FEAT U RES

Contextual Info: UNISONICTECHNOLOGIESCO., LTD U74HC00 CMOS IC QU ADRU PLE 2 -I N PU T POSI T I V E-N AN D GAT ES ̈ DIP-14 DESCRI PT I ON The U74HC00 is a adruple 2-input positive-NAND gate with provides the function Y = A • B or Y = A + B. ̈ FEAT U RES SOP-14 * Operation voltage range: 2.0 V ~6.0 V

intellon p111

Abstract: Intellon intellon p300 intellon p200 P300 SSC P200 EIA-600 p300ra SSC-P300 P111
Contextual Info: Technical Data Sheet SSC P300 PL Network Interface Controller Features • Enables Low-cost CEBus compatible products • EIA-600 CEBus Data Link Layer services • EIA-600 Physical Layer transceiver • Spread Spectrum Carrier Power Line technology

EM78458

Abstract: EM78459 78459
Contextual Info: EM78458/459 8-Bit Microcontroller with MASK ROM Product Specification DOC. VERSION 1.4 ELAN MICROELECTRONICS CORP. May 2005 Trademark Acknowledgments: IBM is a registered trademark and PS/2 is a trademark of IBM. Windows is a trademark of Microsoft Corporation.

nichicon LOT date code

Abstract: Nichicon WEEK CODE sanelek cp 120 NICHICON DATE CODE MARKING
Contextual Info: S P E C I F I C A T I ON OF ALUMINUM ELECTROLYTIC U D sheet 1 of 21 s e r i CAPACITORS e s APPROVED 71. ¿ ¿ d L r DIG. No. H9 0 6 1 1F 1 ^ /9 ¡ J DESIGNED REV. LET. LET. CHECKED REVISIONS DATE N ICHI CON CORPORATION DR. CK. AP. sheet 2 1. SCOPE This specification covers ”U D series”chip type aluminum electrolytic

25S557

Abstract: AM25S557 Am25S05
Contextual Info: Am25S557/Am25S558 Am25S557/Am25S558 Eight-Bit by Eight-Bit Combinatorial Multiplier DISTINCTIVE CHARACTERISTICS Multiplies two 8 -bit numbers - 16-bit output Combinatorial - no clocks required Full 8 x 8 multiply in 45ns typ. Cascades to 1 6 x 1 6 in 110ns typ.