AGERE SYSTEMS Search Results

tag 8833

Abstract: RSP RELAY scr tag 89 marking RSP tag b1
Contextual Info: Product Brief June 2001 PayloadPlus Agere System Interface Introduction Agere System Interface The Agere Systems PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full

CSP1034ah

Abstract: CSP1027 "caller ID" "type 2" hybrid l56xmf pll modem emi fdsp dsvd echo IS-101 voice modem
Contextual Info: Agere Systems - K56flex Access > V.90/K56flex Modem Chip Sets > Product Data Product Note June 1997 Mars™ Agere Systems L56xMF Host-Based Controller K56flex Modem Chip Set with Integrated PCI-Bus Interface Introduction Agere Systems PCI Host-Accelerated Modem Chip Set L56xMF is the next generation of host-based controller modem

FW533

Abstract: L-FW533
Contextual Info: FW533 PCI Express 1394a PHY/Link Open Host Controller Interface Product Brief Introduction The Agere Systems FW533 is specifically designed for PCI Express. It combines an OHCI open host controller interface with Agere’s TrueFIRE technology and a

agere hard disk

Contextual Info: News & Events News Archive Financial Press Releases Media Contacts Trade Shows Webcasts Search Site Map | Contact Us Agere Systems Home > News & Events > Press Release Agere Systems Introduces Single-Chip SONET Framers for Low-Cost Network Access Products, Ethernet Over Sonet Protocol

Viterbi Trellis Decoder texas

Abstract: AGERE DSP DSP1610 Simulator Agere non-linear detection ARM JTAG Programmer Schematics input id 54175 yd 4145 nec k 4145 Viterbi Trellis Decoder tag 8833
Contextual Info: December 2001 DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual A Word About Trademarks . . . The following Agere Systems Inc. trademark is used in this manual: Tapdance The following trademarks, owned by entities other than Agere Systems Inc., are used in this manual:

CSP1034

Abstract: T7525 CSP1034AH DIGITAL VOICE ECHO CANCELER IMPLEMENTATION ON THE Simultaneous voice and data modem CSP1034A Implementation Acoustic Echo Canceler pll modem emi caller id dsvd echo
Contextual Info: Agere Systems - K56flex Access > V.90/K56flex Modem Chip Sets > Product Data Product Note July 1997 Apollo™ Family Agere Systems L56xAFI and L56xL Host-Based Controller Modem Chip Set with K56flex Introduction Joining the Apollo family of host-based controller modems is the L56xAFI full-featured Apollo-IV modem chip set and the

AN3131

Abstract: HDB3 DS3150 DS3151 DS3152 DS3153 DS3154 E1 HDB3 T3/8C802
Contextual Info: Application Note 3131 Connecting the Agere Ultramapper Device Family to Dallas T3/E3 LIUs www.maxim-ic.com INTRODUCTION This application note shows how to connect the Dallas DS3150 or DS315x series of T3/E3 LIUs to the Agere Systems Inc. Ultramapper device family. The DS3150 and DS315x series of T3/E3 LIUs perform all the functions

AGERE SYSTEMS

Abstract: ic 7495 7495 ic 1-70000-A1 USS-344 USS-344 QuadraBus "USB" peripheral
Contextual Info: Product Brief, Rev. 4 September 2000 Agere QuadraBus USB Card QuadraBus Card Description The add-in PCI card based on the Agere Systems Inc. USS-344 QuadraBus USB chip is a four host universal serial bus USB peripheral component interconnect (PCI) board. The card gives PC OEMs, VARs, and computer retailers a vehicle to increase their revenues. It can provide an economical way to overcome the bandwidth limitations encountered when consumers connect high-bandwidth devices such as PC video cameras

Agere ASI

Abstract: Agere FPP
Contextual Info: Product Brief April 2001 PayloadPlus Fast Pattern Processor Introduction Fast Pattern Processor The Agere Systems PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full

scheduling

Abstract: Agere ASI POS-PHY utopia
Contextual Info: Product Brief April 2001 PayloadPlus Routing Switch Processor Introduction The Routing Switch Processor The Agere Systems PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full

Agere ASI

Abstract: a bus system with two 7495 "routing tables"
Contextual Info: Product Brief November 2001 PayloadPlus Fast Pattern Processor Introduction Fast Pattern Processor The Agere Systems PayloadPlus architecture provides a unique hardware and software combination that delivers high-speed processing for multiple communication protocols with full

BCM3351

Abstract: BCM6352 BCM1101 BCM3352 L9500 L9500A MO-220
Contextual Info: Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications L9500A Introduction Applications The Agere Systems Inc. L9500A is a subscriber line interface circuit that is optimized for short-loop, power-sensitive applications. This device provides

Contextual Info: Advance Data Sheet March 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications L9500A Introduction Applications The Agere Systems Inc. L9500A is a subscriber line interface circuit that is optimized for short-loop, power-sensitive applications. This device provides

IBM REV 2.8 manual motherboard

Abstract: agere soc
Contextual Info: Information Manual, Rev. 2 March 2002 USS-344 QuadraBus Information Manual Introduction Evaluation Kit Contents Thank you for evaluating the Agere Systems USS344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller. This kit contains everything you need

IBM REV 2.8 manual motherboard

Contextual Info: Information Manual, Rev. 3 September 2002 USS-344 QuadraBus Information Manual Introduction Evaluation Kit Contents Thank you for evaluating the Agere Systems USS344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller. This kit contains everything you need

L9312

Abstract: T7504 T8536 TR-57 ptc pspice RELAY CIRCUIT TR57
Contextual Info: Data Sheet July 2001 L9312 Line Interface and Line Access Circuit Forward Battery SLIC and Ringing Relay for TR-57 Applications Introduction Description The Agere Systems Inc. L9312 is a combination fullfeature, ultralow-power SLIC, and solid-state ringing

Contextual Info: Product Brief April 2005 Advanced PayloadPlus APP300 Access Network Processors Introduction The Agere Systems Advanced PayloadPlus APP300 network processor devices are the latest addition to the PayloadPlus family of products. These devices offer a comprehensive programmable solution with

bcm3351

Abstract: BCM6
Contextual Info: Preliminary Data Sheet March 2002 L9500B High-Voltage Ringing SLIC for VoIP Applications L9500B Introduction Applications The Agere Systems Inc. L9500B is a subscriber line interface circuit SLIC that is optimized for short-loop, powersensitive applications. This device provides the complete

STATES10

Contextual Info: Data Sheet March 2001 L9312 Line Interface and Line Access Circuit Forward Battery SLIC and Ringing Relay for TR-57 Applications Introduction Description The Agere Systems Inc. L9312 is a combination fullfeature, ultralow-power SLIC, and solid-state ringing

Internal diagram of ic 7495

Abstract: TPCS480 epd driver ic EPD controller
Contextual Info: Product Brief June 2001 TPCS480 High-Speed Switching Protocol Independent Scheduler PI-Sched Introduction The protocol independent scheduler (PI-Sched) is part of Agere Systems ’ high-speed switching family of devices. It provides a highly integrated, innovative,

BCM63

Abstract: bcm3351 bcm6352 BCM 4505 BCM6 bcm 7444
Contextual Info: Data Sheet January 2002 L9500A High-Voltage Ringing SLIC for VoIP Applications L9500A Introduction Applications The Agere Systems Inc. L9500A is a subscriber line interface circuit that is optimized for short-loop, power-sensitive applications. This device provides

16411A1

Abstract: MARKING CODE ADEE ED9 marking diode Marking a4v DSP16000 marking code A6V DSP16410 DSP16411 TDO01 DSP16K
Contextual Info: Advisory December 2002 DSP16411 SEMI Design Exception Overview Agere Systems’ DSP16411 is the next-generation digital signal processor based on the DSP16000 core architecture offering increased speed and on-chip memory. The system and external memory interface

Agere ASI

Abstract: APP550 NP10 TM10 "L2TP"
Contextual Info: Product Brief Brief Product September 2002 September 2002 Advanced PayloadPlus Network Processor APP550 Introduction The Agere Systems Advanced PayloadPlus Network Processor device is the latest addition to the PayloadPlus family of products. It offers a

BCM3351

Abstract: L9500 VKKD BCM1101 BCM3352 BCM6352 L9500B MO-220 sine wave generator using ic 555 BCM6
Contextual Info: Preliminary Data Sheet February 2002 L9500B High-Voltage Ringing SLIC for VoIP Applications L9500B Introduction Applications The Agere Systems Inc. L9500B is a subscriber line interface circuit SLIC that is optimized for short-loop, powersensitive applications. This device provides the complete