AK19 Search Results

MC 4011 BCP

Abstract: PKT 4113 API ncp 6131 SWITCHING SYSTEMS INTERNATIONAL sqm 225 leach 1522 her 4541 MSP SNCP t 1451 n 52 toh SWITCHING SYSTEMS INTERNATIONAL sqm 350 k2400 EQUIVALENT
Contextual Info: EtherPHAST -24 Device 2x OC-12/STM-4 SONET/SDH Ethernet Mapper TXC-06745 DATA SHEET TXC-06745-MB, Ed. 2 February 2006 FEATURES APPLICATIONS • Client Interfaces: 2x GMII/24x SMII/4x TBI/MPI 24 channel packet all pin shared • Two serial Gigabit Ethernet (1.25 Gbit/s) ports with integrated CRSU/SerDes (8B/10B)

Contextual Info: 66AK2E05, 66AK2E02 SPRS865B—June 2013—Revised January 2014 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 66AK2E05/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz

18n5o

Abstract: BA2N15 SGX530 PowerVR SGX530 0x4803 Ps3 MOTHERBOARD CIRCUIT diagram DDR2-800 AM38x 15F4 17 inch lcd monitor
Contextual Info: AM3894 AM3892 www.ti.com SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 AM389x Sitara ARM Microprocessors MPUs Check for Samples: AM3894, AM3892 1 Device Summary 1.1 Features • High-Performance Sitara ARM Microprocessors (MPUs) – ARM® Cortex™-A8 RISC MPU

ah30 diode

Abstract: AH34 mosfet ak24 diode thermistor M33 irf7832 ISL62882 n34 transistor w8 mosfet transistor c36 Burndy y34 lug specifications
Contextual Info: ISL62882EVAL2Z User Guide Application Note April 9, 2009 AN1461.0 Author: Jia Wei Introduction Interface Connections The ISL62882EVAL2Z evaluation board demonstrates the performance of the ISL62882 multiphase synchronous-buck PWM VCORE controller implementing Intel IMVP-6.5

00XXX001

Abstract: BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12
Contextual Info: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Baseline FPGA family used in Series 3+ FPSCs field programmable system chips which combine FPGA logic

RT3PE600L

Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
Contextual Info: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging

Contextual Info: Freescale Semiconductor MPC8349EEC Rev. 2, 5/2005 Advance Information MPC8349E PowerQUICC II Pro Integrated Host Processor Hardware Specifications The MPC8349E contains a PowerPC processor core with system logic required for networking, storage, and general-purpose embedded applications. For functional

Contextual Info: TMS320DM8168, TMS320DM8167 TMS320DM8166, TMS320DM8165 www.ti.com SPRS614 – MARCH 2011 TMS320DM816x DaVinci Digital Media Processors Check for Samples: TMS320DM8168, TMS320DM8167, TMS320DM8166, TMS320DM8165 1 Device Summary 1.1 Features • High-Performance DaVinci Digital Media

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD98502 NETWORK CONTROLLER The µPD98502 network controller is an LSI for network terminal applications such as ADSL systems. The controller integrates a VR4120A MIPS RISC CPU core, memory interface, PCI, and other network interface

A3PE1500

Abstract: A3PE3000 IO23PDB0V2 IO23NDB0V2 IO30PDB1V1 IO05PDB0V0 IO06PDB0V1 IO32PDB1V1 IO10PDB0V1 IO283PDB7V1
Contextual Info: ProASIC3E Packaging 3 – Package Pin Assignments 208-Pin PQFP 1 208 208-Pin PQFP Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .

A3PE3000L FG484

Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
Contextual Info: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for

APA600

Abstract: AA23 APA075 APA1000 APA150 APA300 APA450 APA750
Contextual Info: ProASICPLUS Flash Family FPGAs Package Pin Assignments 100-Pin TQFP 1 100 100-Pin TQFP Note For Package Manufacturing and Environmental information, visit the Package Resource center at . v5.8 2-1 ProASICPLUS Flash Family FPGAs

Contextual Info: Freescale Semiconductor MPC8349EEC Rev. 8, 2/2007 Technical Data MPC8349E PowerQUICC II Pro Integrated Host Processor Hardware Specifications The MPC8349E PowerQUICC™ II Pro is a next generation PowerQUICC II integrated host processor. The MPC8349E contains a PowerPC™ processor core built on Power

729-Pin

Abstract: Axcelerator FPGAs AX125 IO126PB3F11 AG18 FBGA 896 896-Pin Axcelerator Family FPGAs
Contextual Info: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at

0X0F00

Contextual Info: AM3894 AM3892 www.ti.com SPRS681D – OCTOBER 2010 – REVISED APRIL 2012 AM389x Sitara ARM Processors Check for Samples: AM3894, AM3892 1 Device Summary 1.1 Features 1234567891011 • High-Performance Sitara™ ARM® Processors – ARM® Cortex™-A8 RISC Processor

Contextual Info: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15

Contextual Info: Product Folder Sample & Buy Technical Documents Tools & Software Support & Community TMS320DM8168, TMS320DM8167 TMS320DM8165 SPRS614E – MARCH 2011 – REVISED FEBRUARY 2014 TMS320DM816x DaVinci Video Processors 1 Device Summary 1.1 Features 1 • High-Performance DaVinci Video Processors

Contextual Info: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15

Contextual Info: Electrical Characteristics 12.1 Signal Specifications 12.1.1 Unused Pins 12 For reliable operation, always connect unused inputs to an appropriate signal level. Unused A G TL+ inputs should be connected to V 7 7 . Unused active low 3.3 V-tolerant inputs should be

sgx530* vector graphics manual

Abstract: universal shift register using cpld
Contextual Info: TMS320C6A8168 TMS320C6A8167 SPRS680B – OCTOBER 2010 – REVISED AUGUST 2011 www.ti.com TMS320C6A816x C6-Integra DSP+ARM Processors Check for Samples: TMS320C6A8168, TMS320C6A8167 1 Device Summary 1.1 Features 1234567891011 • High-Performance C6-Integra DSP+ARM

SPRS836D

Contextual Info: TCI6638K2K SPRS836D—February 2012—Revised October 2013 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 TCI6638K2K Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point DSP Core

Contextual Info: Product Obsolete/Under Obsolescence R XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table Continued XC4013XLA Pinout Table PAD NAME PQ160 PQ208 PQ240 I/O – – P21 BG256 H1 PAD NAME PQ160 PQ208

Contextual Info: Spartan-6 FPGA Clocking Resources User Guide UG382 v1.8 June 20, 2013 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL

AES-128

Abstract: FG256 FG484
Contextual Info: v2.0 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power