AR17 Search Results

AR177

Abstract: bipolar transistor tester IC5-IC6 power supply mje1300
Contextual Info: AR177 PROPER TESTING CAN MAXIMIZE PERFORMANCE IN POWER MOSFETs Prepared by Kim Gauen and Warren Schultz Motorola Inc. Reprinted with permission of EDN. May, 1987 issue. 1987 Cahner's Publishing. All rights reserved. M MOTOROLA Semiconductor Products Inc.

P4N50

Abstract: TP4N50 AR175 MTM20N08 motorola mosfet 1986 TMOS spice model Nippon capacitors motorola EPI
Contextual Info: AR175 A POWER FET SPICE MODEL FROM DATA SHEET SPECS by Gary Fay Device Design Manager Judy Sutor Development Engineer Reprinted with permission of POWERTECHNICS, August 1986 issue. 1986 Darnell Research Inc. All Rights Reserved. M OTOROLA < 8 >Semiconductor

mip 291

Abstract: mip 290
Contextual Info: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025 – AUGUST 1998 D D D D D D D D D D D D D Single-Chip Parallel Multiple Instruction / Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second Master Processor (MP)

18n5o

Abstract: BA2N15 SGX530 PowerVR SGX530 0x4803 Ps3 MOTHERBOARD CIRCUIT diagram DDR2-800 AM38x 15F4 17 inch lcd monitor
Contextual Info: AM3894 AM3892 www.ti.com SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 AM389x Sitara ARM Microprocessors MPUs Check for Samples: AM3894, AM3892 1 Device Summary 1.1 Features • High-Performance Sitara ARM Microprocessors (MPUs) – ARM® Cortex™-A8 RISC MPU

ah30 diode

Abstract: AH34 mosfet ak24 diode thermistor M33 irf7832 ISL62882 n34 transistor w8 mosfet transistor c36 Burndy y34 lug specifications
Contextual Info: ISL62882EVAL2Z User Guide Application Note April 9, 2009 AN1461.0 Author: Jia Wei Introduction Interface Connections The ISL62882EVAL2Z evaluation board demonstrates the performance of the ISL62882 multiphase synchronous-buck PWM VCORE controller implementing Intel IMVP-6.5

SuperSPARC

Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Contextual Info: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys­

radix-8 FFT

Abstract: DBGA KD 472 M mov CMAC A15B2 sc sf 12A H4 17ER CI23 honeywell hx3000 HX3000
Contextual Info: DSP Architectures RHDSP24 Radiation Hardened Scalable DSP Chip Transform Your WorldTM Data Sheet Real 24 PORT A Imag 24 RHDSP24 Imag 24 24 24 X INPU TB US Y INPUT BU S O U TP U TB US 24 48 Imag 24 Scheduler/ Controller X Y Memory A 24 Memory B 24 System Controls

Contextual Info: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B - AUGUST 1998 - REVISED JUNE 2002 D Single-Chip Parallel Multiple D D D D D D D D D D D D Instruction/Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second

Contextual Info: TMS320DM8168, TMS320DM8167 TMS320DM8166, TMS320DM8165 www.ti.com SPRS614 – MARCH 2011 TMS320DM816x DaVinci Digital Media Processors Check for Samples: TMS320DM8168, TMS320DM8167, TMS320DM8166, TMS320DM8165 1 Device Summary 1.1 Features • High-Performance DaVinci Digital Media

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H - OCTOBER 1993 - REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL-PRF-38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges: - Military M -55°C to 125°C

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H - OCTOBER 1993 - REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL-PRF-38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges: - Military M -55°C to 125°C

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H - OCTOBER 1993 - REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL-PRF-38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges: - Military M -55°C to 125°C

Contextual Info: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B - AUGUST 1998 - REVISED JUNE 2002 D Single-Chip Parallel Multiple D D D D D D D D D D D D Instruction/Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H – OCTOBER 1993 – REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL–PRF–38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges:

VR12000

Abstract: uPD30710 0PC25 SGI DSD uPD30700 tag 9022 VR10000 VR5000TM uPD30710RS-300 U12703EJ1V0DS00
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD30700,30700L,30710 VR10000TM, VR12000TM 64-BIT MICROPROCESSORS DESCRIPTION The µPD30700 and 30700L VR10000 and µPD30710 (VR12000) are new members of NEC’s VR seriesTM RISC (Reduced Instruction Set Computer) microprocessors. These new high-performance 64-bit microprocessors employ

C8050

Abstract: AB32 AB34 TMS320C80
Contextual Info: TMS320C80 Digital Signal Processor Data Sheet 1997 Digital Signal Processing Solutions Printed in U.S.A., October 1997 SPRS023B Book Type Data Sheet TMS320C80 DSP 1997 TMS320C80 DIGITAL SIGNAL PROCESSOR SPRS023B – JULY 1994 – REVISED OCTOBER 1997 D D D

AT49LD3200

Contextual Info: Features • 3.0V to 3.6V Read/Write • Burst Read Performance • • • • • • • • • • – <100 MHz RAS Latency = 2, CAS Latency = 6 , 10 ns Cycle Time tSAC = 7 ns – <75 MHz (RAS Latency = 2, CAS Latency = 5), 13 ns Cycle Time tSAC = 8 ns

0X0F00

Contextual Info: AM3894 AM3892 www.ti.com SPRS681D – OCTOBER 2010 – REVISED APRIL 2012 AM389x Sitara ARM Processors Check for Samples: AM3894, AM3892 1 Device Summary 1.1 Features 1234567891011 • High-Performance Sitara™ ARM® Processors – ARM® Cortex™-A8 RISC Processor

Contextual Info: Product Folder Sample & Buy Technical Documents Tools & Software Support & Community TMS320DM8168, TMS320DM8167 TMS320DM8165 SPRS614E – MARCH 2011 – REVISED FEBRUARY 2014 TMS320DM816x DaVinci Video Processors 1 Device Summary 1.1 Features 1 • High-Performance DaVinci Video Processors

ld18 st

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H − OCTOBER 1993 − REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL−PRF−38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges:

Contextual Info: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B - AUGUST 1998 - REVISED JUNE 2002 D Single-Chip Parallel Multiple D D D D D D D D D D D D Instruction/Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second

sgx530* vector graphics manual

Abstract: universal shift register using cpld
Contextual Info: TMS320C6A8168 TMS320C6A8167 SPRS680B – OCTOBER 2010 – REVISED AUGUST 2011 www.ti.com TMS320C6A816x C6-Integra DSP+ARM Processors Check for Samples: TMS320C6A8168, TMS320C6A8167 1 Device Summary 1.1 Features 1234567891011 • High-Performance C6-Integra DSP+ARM

T9550

Abstract: intel p8400 p8600 P9700 diode AH44 320-122 T9900 X9100 CXE DIODE micro switch lie n41
Contextual Info: Intel Core 2 Duo Mobile Processor, Intel® Core™2 Solo Mobile Processor and Intel® Core™2 Extreme Mobile Processor on 45-nm Process Datasheet For platforms based on Mobile Intel® 4 Series Express Chipset Family March 2009 Document Number: 320120-004

SPRS836D

Contextual Info: TCI6638K2K SPRS836D—February 2012—Revised October 2013 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 TCI6638K2K Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point DSP Core