AS7C3 Search Results

AS7C331MNTD32A

Abstract: AS7C331MPFD32A AS7C332MPFD18A AS7C332MPFS18A
Contextual Info: November 2004 AS7C331MNTD32A AS7C331MNTD36A 3.3V 1M x 32/36 Pipelined SRAM with NTDTM Features • Organization: 1,048,576 words × 32 or 36 bits • NTD architecture for efficient bus operation • Fast clock speeds to 200 MHz • Fast clock to data access: 3.2/3.5/3.8 ns

AS7C34098

Abstract: AS7C34098A AS7C34098A-10JC
Contextual Info: AS7C34098A August 2004 3.3 V 256 K x 16 CMOS SRAM Features • Pin compatible with AS7C34098 • Industrial and commercial temperature • Organization: 262,144 words × 16 bits • Center power and ground pins • High speed • Easy memory expansion with CE, OE inputs

AS7C32096A

Abstract: AS7C32096A-10TC AS7C32096A-10TI AS7C32096A-12TC AS7C32096A-12TI AS7C32096A-15TC AS7C32096A-15TI AS7C32096A-20TC AS7C32096A-20TI
Contextual Info: February 2006 AS7C32096A 3.3V 256K x 8 CMOS SRAM Features • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages • Industrial and commercial temperature • Organization: 262,144 words × 8 bits

Contextual Info: 32Kx8 3.3V SRAM AS7C3256 Logic Block Diagram Features ♦ High Performance CMOS: tAA=10-25 ns ♦ Fast OE access: t0 E=3-6 ns ♦ Very low power - 216 m W @ 100 M H z - 3.6 m W @ 10 M H z standby - 1.1 mW @ • I/07 10 M H z standby: L version ♦ Automatic CE power down

AS7C33512NTD36A

Contextual Info: Advance information June 2001 AS7C33512NTD32A AS7C33512NTD36A 3.3V 512Kx32/36 SRAM with NTDTM Features • Organization: 524,288 words × 32 or 36 bits • NTD architecture for efficient bus operation • Fast clock speeds to 200 MHz in LVTTL/LVCMOS

dsp processor Architecture of TMS320C6X

Abstract: AS7C33256PFD16A AS7C33256PFD18A AS7C33256PFS16A AS7C33256PFS18A TMS320C6X
Contextual Info: March 2001 AS7C33256PFD16A AS7C33256PFD18A 3.3V 256K x 16/18 pipeline burst synchronous SRAM Features • Organization: 262,144 words × 16 or 18 bits • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/3.8/4.0/5.0 ns • Fast OE access time: 3.5/3.8/4.0/5.0 ns

Contextual Info: High Performance 32KX83.3Y CMOS SRAM •■ II AS7C3256 AS7G3256L L ow v o ltage 3 2 K x 8 C M O S SR A M Features • • • • O rganization: 32,7 6 8 w o rd s x 8 bits Single 3.3 ± 0.3V p o w e r supply 5V tolerant I /O specification H igh speed - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e

AS7C38096A

Abstract: AS7C38096A-10TIN AS7C38096A-10BIN
Contextual Info: FEBRUARY 2012 AS7C38096A 1M X 8 BIT HIGH SPEED CMOS SRAM FEATURES GENERAL DESCRIPTION  Fast access time : 10ns  Very low power consumption: Operating current: 80mA TYP. 10ns Standby current (Normal version): 3mA(TYP.)  Single 3.3V power supply  All inputs and outputs TTL compatible

7C1025

Contextual Info: AS7C1025 AS7C31025 J l 5V/3.3V 128Kx8 CMOS SRAM Common I/O Features • O rganization: 1 3 1 ,0 7 2 w o rd s x 8 b i s • H jgh gpead - 1 0 / 1 2 / 1 5 / 2 0 nsad d ress access tin e - 3 / 3 / 4 / 5 n s o u tp u t enabie access tim. e • Low pow e rc o n s jm ption

Contextual Info: Advance information •■ AS7C31026LL II 3.3V 6 4K x 16 Intelliwatt'1' low power CM O S SRAM Features • Optimized design for battery operated portable systems • Intelliwatt active power reduction circuitry • Organization: 65,536 words X 16 bits • 2.7 V to 3.6V operating range

Contextual Info: Advance information •■ AS7C3512K16P AS7C3512K18P Il II 3.3V 512K- 16 ‘18 pipeline burst synchronous SRAM Features • • • • • • • • • Organization: 5 2 4 ,2 8 8 w ord s x 16 or 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3 . 5 / 3 . 8 / 4 / 5 ns

Contextual Info: High Performance 128KX8 CMOS SRAM AS7C1024 AS7C31024 128KX8 CMOS SRAM Features • Organization: 131,072 words x 8 bits • High speed - 1 0 / 1 2 / 1 5 / 2 0 / 2 5 ns address access time - 3 / 3 / 4 / 5 / 6 ns output enable access time • Low power consumption

AS7C3513

Abstract: AS7C3513-12 AS7C513 AS7C513-12
Contextual Info: March 2001 AS7C513 AS7C3513 5V/3.3V 32Kx16 CMOS SRAM Features • AS7C513 5V version • AS7C3513 (3.3V version) • Industrial and commercial temperature • Organization: 32,768 words × 16 bits • Center power and ground pins • High speed - 12/15/20 ns address access time

AS7C4096-15JI

Abstract: AS7C34096 AS7C4096 AS7C34096-12TI
Contextual Info: October 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

Contextual Info: May 2004 AS7C33512NTF32A AS7C33512NTF36A 3.3V 512K x 32/36 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 524,288 words × 32 or 36 bits NTD 1 architecture for efficient bus operation

Contextual Info: AS7C33128PFD18B May 2004 3.3V 128K x 18 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • • • • Organization: 131,072 words × 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/4.0 ns

MA1019

Contextual Info: October 2001 Advance Information AS7C1025A AS7C31025A 5V/3.3V 128K X 8 CMOS SRAM Revolutionary pinout Features • • • • • AS7C1025A (5V version) AS7C31025A (3.3V version) Industrial and commercial temperatures Organization: 131,072 x 8 bits High speed

Contextual Info: August 2004 AS7C33512FT18A 3.3V 512K x 18 Flow-through synchronous SRAM Features • • • • • • • • • • • Organization: 524,288 words × 18 bits Fast clock to data access: 7.5/8.5/10ns Fast OE access time: 3.5/4.0/4.0 ns Fully synchronous flow-through operation

Contextual Info: March 2001 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • Latest 6T 0.25u CMOS technology • 2.0V data retention • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging

Contextual Info: Advanced Information July 2001 AS7C331MPFD18A 3.3V 1M x 18 pipeline burst synchronous SRAM Features • Asynchronous output enable control • Organization: 1,048,576 x 18bits • Economical 100-pin TQFP package • Fast clock speeds to 200MHz in LVTTL/LVCMOS

AS7C33256PFS18B-166TQC

Contextual Info: AS7C33256PFS16B AS7C33256PFS18B October 2003 3.3V 256K x 16/18 pipeline burst synchronous SRAM Features •Byte write enables •Multiple chip enables for easy expansion •3.3V core power supply •2.5V or 3.3V I/O operation with separate VDDQ •30 mW typical standby power in power down mode

Contextual Info: February 2006 AS7C3256A-8 3.3V 32K X 8 CMOS SRAM Common I/O Features • Easy memory expansion with CE and OE inputs • TTL-compatible, three-state I/O • 28-pin JEDEC standard packages - 300 mil SOJ - 8 x 13.4 mm TSOP 1 • ESD protection ≥ 2000 volts

Contextual Info: AS7C33256PFS16A AS7C33256PFS18A December 2002 3.3V 256K x 16/18 pipeline burst synchronous SRAM Features • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ • 30 mW typical standby power in power-down mode

MA1022

Contextual Info: October 2003 AS7C331MPFS18A 1M x 18 pipelined burst synchronous SRAM Features • Organization: 1,048,576 x18 bits • Fast clock speeds to 166MHz in LVTTL/LVCMOS • Fast clock to data access: 3.4/3.8 ns • Fast OE access time: 3.4/3.8 ns • Fully synchronous register-to-register operation