ASR-10 SS Search Results

Contextual Info: TO SH IBA TC55V1001 AF/AFT/ATR/AST/ASR-85,-10,-85L.-1 OL T O SH IB A M O S DIGITAL INTEGRATED CIRCUIT SILICON GATE C M O S 131,072-WORD BY 8-BIT STATIC RAM DESCRIPTION The TC55V1001AF/AFT/ATR/AST/ASR is a 1,048,576-bit static random access memory SRAM organized as

Contextual Info: TOSHIBA TC55V1001 AF/AFT/ATR/AST/ASR-85,-10.-85L.-1 OL T O SH IB A M O S DIGITAL INTEGRATED CIRCUIT SILICON GATE C M O S 131,072-WORD BY 8-BIT STATIC R A M DESCRIPTION The TC55V1001AF/AFT/ATR/AST/ASR is a 1,048,576-bit static random access memory SRAM organized as

D1068

Abstract: CD 76 13 CP
Contextual Info: Do 0 9 I r ~ 0 5 - 2 a 9.L Oo. 0 2 I a •V pI 1Q2 Do S Z = o i o ¿ [ MI * I (Do Q2 = 'ei1) D ¿ [ y ia g ú vr a i Voi o i 6 10 asr 3l Ú ( v T 'i ) VI dD l AO I oasA A00 6 030 a A0 0 0 I O SD a A — // i- A. ¿ ¿ / A lliT - n TZ C y V 'X jg,2¡? -í Í T • ^ ^ / i C

mt4c1004j

Abstract: 4C1004 4c1004j
Contextual Info: MT4C1004J L 4 MEG X 1 DRAM |u iic = n o N DRAM 4 MEG x 1 DRAM 5V, FAST PAGE MODE, OPTIONAL EXTENDED REFRESH FEATURES • 1,024-cy cie refresh d istrib u ted a cro ss 16m s (M T 4C 1004J) o r 128m s (M T 4C 1004J L only) • In d u stry-stan d ard p in o u t, tim ing , fu n ctio n s and

Contextual Info: MT4C4001 J L MEG X 4 DRAM DRAM 1 MEG x 4 DRAM 5V, FAST PAGE MODE, OPTIONAL EXTENDED REFRESH FEATURES • 1,024-cy cle refresh d istrib u ted acro ss 16m s (M T 4C 4001J) o r 128m s (M T 4C 4001J L) • In d u stry -sta n d a rd p in ou t, tim ing , fu nction s and

Contextual Info: 0U| 1X6o|oul|o x U0J3|1/\| ‘¿ 66 L© eo ito u I y suoiiE o^ioeds io s p n p o jd e B u e ijo o i m 6u e q i s e /u e s e j ‘ ou| ‘À6o|ouLjoej_ u o jo i^ A|uo ODA Lai 80d 9Qd TOd sad SSA uoa ozoa 6900 89 00 ODA ¿9 0 0 99 00 39oa woa SSA e9oa s9oa

LH231G

Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200

4.5" OD tubing details

Contextual Info: TITLE DOCUMENT No. DATE REV. PAGE ASR Cable Specifications CABLE-ASR 6/25/12 - 1 of 2 The ASR series of VNA test cables offers a high performance assembly for precision test applications. It provides a test setup which will maintain its configuration for a very repeatable test platform. The NMD connectors*

Contextual Info: TITLE DOCUMENT No. DATE REV. PAGE ASR-F Cable Specifications CABLE-ASR-F 6/26/12 - 1 of 2 The ASR-F series of VNA test cables offers a flexible alternative to the original high performance ASR design. It offers a durable construction for long-lasting and repeatable test results. The NMD connectors* allow for

Contextual Info: 0U| 1X6 o |oul |o x U0J3|1/\| ‘9 6 6 1. eo ito u suoiiE o^ioeds io s p n p o jd e B u e ijo o i m 6 u e q i s e /u e s e j ‘ ou| ‘À6o|ouLjoej_ u o jo i^ A|uo ODA ssa 9SL SSL i?sl SSL SSL LSL OSL 6LL 8LL ¿LL 9LL SLL HL SLL SLL LLL OLL 60 L 80 L ¿OL

514400BJ-50

Abstract: Q67100-Q973 Q67100-Q756
Contextual Info: 1M x 4-Bit Dynamic RAM HYB 514400BJ-50/-60 Advanced Information • 1 048 576 words by 4-bit organization • 0 to 70 °C operating temperature • Fast Page Mode Operation • Performance: -50 -60 tRAC RAS access time 50 60 ns tCAC CAS access time 13 15

HYB3117800

Abstract: HYB5117800 SOJ-28
Contextual Info: 2M x 8 - Bit Dynamic RAM 2k Refresh Fast Page Mode HYB 5117800/BSJ-50/-60 HYB 3117800BSJ-50/-60 Advanced Information • 2 097 152 words by 8-bit organization • 0 to 70 °C operating temperature • Fast Page Mode operation • Performance: -50 -60 tRAC

WCs MARKING

Abstract: 514100BJ Q67100-Q759 Q67100-Q971 SMD MARKING CODE RAC code marking rah SMD MARKING code ASC
Contextual Info: 4M x 1-Bit Dynamic RAM HYB 514100BJ-50/-60 Advanced Information • 4 194 304 words by 1-bit organization • 0 to 70 °C operating temperature • Fast Page Mode Operation • Performance: -50 -60 tRAC RAS access time 50 60 ns tCAC CAS access time 13 15

SPT0305

Abstract: Q67100-Q2021 Q67100-Q727
Contextual Info: 256k x 16-Bit Dynamic RAM HYB 514171BJ-50/-60 Advanced Information • • • • • • • • • 262 144 words by 16-bit organization 0 to 70 °C operating temperature Fast access and cycle time • Standby power dissipation 11 mW standby TTL 5.5 mW max. standby (CMOS)

SPT0305

Abstract: Q67100-Q2072 Q67100-Q2073 Q67100-Q2100
Contextual Info: 256k x 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60 Advanced Information • • • • • • • • • 262 144 words by 16-bit organization 0 to 70 °C operating temperature Fast access and cycle time • Low Power dissipation max. 1100 mW active -50 version

smd code marking rac

Abstract: HYB3118160 HYB5118160 RAD SMD MARKING CODE
Contextual Info: 1M x 16-Bit Dynamic RAM 1k Refresh Fast Page Mode HYB 5118160BSJ-50/-60 HYB 3118160BSJ-50/-60 Advanced Information • 1 048 576 words by 16-bit organization • 0 to 70 °C operating temperature • Fast Page Mode operation • Performance: -50 -60 tRAC

sem 2105 16 pin

Abstract: sem 2106 data set IC SEM 2105 MCM514258-10 sem 2106 circuit diagram sem 2106 514258 sem 2106 24 pin MCM514258-12 sem 2107
Contextual Info: MOTOROLA •i SEM ICONDUCTOR TECHNICAL DATA MCM514258 Advance Information 2 5 6 K x 4 CM O S Dynamic RAM P PACKAGE PLASTIC CA SE 738A Th e M CM514258 is a 1.2 n C M O S high-speed, dynamic random acce ss mem ory. It is organized a s 262,144 four-bit words and fabricated w ith C M O S silicon-gate process tech­

Contextual Info: SIEM EN S 2M x 8 - Bit Dynamic RAM 2k Refresh Fast Page Mode HYB 5117800/BSJ-50/-60 HYB 3117800BSJ-50/-60 Advanced Information • 2 097 152 words by 8-bit organization • 0 to 70 °C operating temperature • Fast Page Mode operation • Performance: -50

SPT0305

Abstract: BST50 SMD MARKING CODE RAC HYB3118165 HYB5118165 5118165BSJ-60 5118165BSJ
Contextual Info: 1M x 16-Bit Dynamic RAM 1k Refresh Hyper Page Mode-EDO HYB 5118165BSJ/BST-50/-60 HYB 3118165BSJ/BST-50/-60 Advanced Information • 1 048 576 words by 16-bit organization • 0 to 70 °C operating temperature • Hyper Page Mode-EDO-operation • Performance:

we32100

Abstract: tC23E UNUSED26
Contextual Info: Zilog Product S p e c ifica tio n January 1987 Z32106 M AU MATH ACCELERATION UNIT DESCRIPTION T he Z32106 M ath A cceleration U nit M AU provides floating-point capability fo r the Z32100 M icroprocessor and is fully com patible with A N S I/IE E E Standard 754-1985 for Binary

Q67100-Q1104

Abstract: SOJ-28
Contextual Info: 2M x 8-Bit Dynamic RAM 2k Refresh Hyper Page Mode-EDO HYB 5117805/BSJ-50/-60 HYB 3117805/BSJ-50/-60 Advanced Information • 2 097 152 words by 8-bit organization • 0 to 70 °C operating temperature • Hyper Page Mode-EDO-operation • Performance: -50

SASI

Abstract: cmps a13 grd 07 z32106 Z32100 IRR28 we32100
Contextual Info: Zilog P roduct S pecification January 1987 / O D ^ O ^ Z32106 M A U M A T H A C C E L E R A T IO N U N IT DESCRIPTION T he Z32106 M ath A cceleration U nit M AU provides floating-point capability fo r the Z32100 M icroprocessor and is fully com patible with

Contextual Info: VIS VG264260CJ 262,144 x 16 - Bit CMOS Dynamic RAM Preliminary Description The device is CMOS Dynamic RAM organized as 262, 144-word x 16 bits. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design technologies. It is packaged in

Contextual Info: VIS VG264260CJ 262,144 x 16 - Bit CMOS Dynamic RAM Preliminary Description The device is CMOS Dynamic RAM organized as 262, 144-word x 16 bits. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design technologies. It is packaged in