AX4 TRANSISTOR Search Results

transistor marking code 325

Abstract: BSP110 marking r8v
Contextual Info: • 1^53^31 0G25502 flS5 H A P X N AMER PHILIPS/ DIS CRETE BSP110 fc>7E D N-CHANNEL ENHANCEMENT MODE VERTICAL D-MOS TRANSISTOR N-channel enhancement mode vertical D-MOS transistor in a m iniature SOT223 envelope and designed fo r use in telephone ringer circuits and fo r application w ith relay, high-speed and line transformer

AX4 Transistor

Contextual Info: 1 9 -11 36 : R ev 0 :9 /9 6 Quad, L o w - V o l t a g e , SPST A n a l o g S w i t c h e s Features ♦ +2V to +1 2V S ingle S u p p ly ± 2 V to ± 6 V Dual S u p p li e s ♦ 1 OOii S ignal P ath s with ± 5 V S u p p li e s ♦ L o w P o w e r C o n s u m p t io n , <1p W

Contextual Info: 19-3961; Rev 0; 1/99 jy\JY X A JV \ 2.50, Quad, SPST, CMOS Analog Switches _ F e a t u r e s The MAX4601/MAX4602/MAX4603 quad analog switches feature low on-resistance of 2 .50 max. On-resistance is m atched betw een sw itche s to 0.5Q. max and is flat

MAX485

Abstract: MAX14873 AX483EPA AX1487 AX485CPA AX485ESA AX487
Contextual Info: 19-0122; Rev 4; i L o w -P o w er, S le w -R a te -L im ite d R S -4 8 5 /R S -4 2 2 T ra n s c e iv e rs These transceivers draw between 120[jA and 500pA of supply current when unloaded or fully loaded with disabled drivers. Additionally, the MAX481, MAX483, and MAX487

DG1805

Abstract: DG181 SILICONIX DG182BA DG180AP
Contextual Info: DG180/181/182 s*conix High-Speed Drivers with Dual SPST JFET Switches Features Benefits • Constant On-Resistance Over Entire Analog Range • Low Leakage • Low Crosstalk • Rad Hardness • • • • • Applications Low Distortion Eliminates Large Signal Errors

NT5SV16M16AT

Abstract: NT5SV32M8AT NT5SV64M4AT
Contextual Info: NT5SV64M4AT NT5SV32M8AT NT5SV16M16AT NT5SV64M4AW NT5SV32M8AW NT5SV16M16AW 256Mb Synchronous DRAM Features • • • • • • • • • • • • • • • High Performance: -7K 3 CL=2 -75B, CL=3 -8B, CL=2 Units fCK Clock Frequency 133 133 100 MHz

nt5sv32m8at-75b

Abstract: NT5SV16M16AT NT5SV32M8AT NT5SV64M4AT DRAMs
Contextual Info: NT5SV64M4AT NT5SV32M8AT NT5SV16M16AT NT5SV64M4AW NT5SV32M8AW NT5SV16M16AW 256Mb Synchronous DRAM Features • • • • • • • • • • • • • • • High Performance: -7K 3 CL=2 -75B, CL=3 -8B, CL=2 Units fCK Clock Frequency 133 133 100 MHz

Q61P-A2

Abstract: Q38B QX80 mitsubishi qy80 Q312B-E Q61P QJ71C24N-R4 q32cbl-3m QJ71BR11 Q38B-E
Contextual Info: MITSUBISHI ELECTRIC Programmable Logic Controllers MELSEC System Q Technical Catalogue 2004 The MELSEC System Q CPU Modules New Items 2004 Two new high-performance process modules have been added to the existing range of PLC CPU modules, the Q12 P HCPU and Q25(P)HCPU.

CY7C1299A

Contextual Info: 299A CY7C1299A 32K X 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 100 and 83 MHz Fast Access Times: 5.0/6.0 ns Max. Single Clock Operation Single 3.3V –5% and +5% power supply VCC

waveforms of single port asynchronous read and w

Abstract: CY7C1299A
Contextual Info: CY7C1299A 32K x 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 100 and 83 MHz Fast access times: 5.0/6.0 ns max. Single clock operation Single 3.3V –5% and +5% power supply VCC

CY7C1299A

Abstract: CE2Y 126-196
Contextual Info: CY7C1299A 32K x 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 100 and 83 MHz Fast access times: 5.0/6.0 ns max. Single clock operation Single 3.3V –5% and +5% power supply VCC

ay-13

Abstract: CY7C1299A
Contextual Info: CY7C1299A 32K x 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • Fast clock speed: 100 and 83 MHz Fast access times: 5.0/6.0 ns max. Single clock operation Single 3.3V –5% and +5% power supply VCC Separate VCCQ for output buffer

Contextual Info: CY7C1299A 32K x 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • Fast clock speed: 100 and 83 MHz Fast access times: 5.0/6.0 ns max. Single clock operation Single 3.3V –5% and +5% power supply VCC Separate VCCQ for output buffer

DQY33

Contextual Info: 301A PRELIMINARY CY7C1301A 256K X 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 133, 100, and 83 MHz Fast Access Times: 4.0/5.0/6.0 ns Max. Single Clock Operation Single 3.3V –5% and +5% power supply VCC

CE2X

Abstract: CY7C1301A TQFP24
Contextual Info: CY7C1301A 256K X 36 Dual I/O, Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast Clock Speed: 100 and 83 MHz Fast Access Times: 5.0/6.0 ns Max. Single Clock Operation Single 3.3V –5% and +5% power supply VCC

CE1X

Abstract: CY7C1301A CE2Y
Contextual Info: CY7C1301A 256K X 36 Dual I/O, Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast Clock Speed: 100 and 83 MHz Fast Access Times: 5.0/6.0 ns Max. Single Clock Operation Single 3.3V –5% and +5% power supply VCC

Contextual Info: 300A CY7C1300A 128K X 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 100 and 83 MHz Fast access times: 5.0/6.0 ns max. Single clock operation Single 3.3V –5% and +5% power supply VCC

BY 199 equivalent

Abstract: "clock collision"
Contextual Info: ADVANCE INFORMATION GALVANTECH, INC. DUAL PORT SYNCHRONOUS SRAM GVT81256K36/GVT81128K36 256K/128K X 36 DUAL PORT SRAM 256K/128K X 36 SRAM +3.3V SUPPLY, FULLY REGISTERED TWO BI-DIRECTIONAL DATA BUSES FEATURES GENERAL DESCRIPTION • • • • • • •

Contextual Info: 300A PRELIMINARY CY7C1300A 128K X 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 133, 100, and 83 MHz Fast Access Times: 4.0/5.0/6.0 ns Max. Single Clock Operation Single 3.3V –5% and +5% power supply VCC

CY7C1300A

Contextual Info: CY7C1300A 128K X 36 Dual I/O Dual Address Synchronous SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 100 and 83 MHz Fast access times: 5.0/6.0 ns max. Single clock operation Single 3.3V –5% and +5% power supply VCC

Stag ppz

Abstract: 20L8D PLQ20R4-5A PLQ20L8-5A 20L8
Contextual Info: Philips Components-Signetics PLQ20R8-5 Series D ocum en t N o. EC N N o. D ate o f Issue June 1990 S tatus Preliminary Specification PAL -type devices 20L8, 20R8, 20R6, 20R4 Programmable Logic Devices FEATURES DESCRIPTION • Ultra high-speed The Signetics P LQ 20XX family consists

NT5SV32M4CT-75B

Abstract: NT5SV16M8CT NT5SV32M4CT NT5SV8M16CT
Contextual Info: NT5SV32M4CT NT5SV16M8CT NT5SV8M16CT 128Mb Synchronous DRAM Features • High Performance: -7K 3 CL=2 -75B, CL=3 -8B, CL=2 Units fCK Clock Frequency 133 133 100 MHz tCK Clock Cycle 7.5 7.5 10 ns tAC Clock Access Time1 — — — ns tAC Clock Access Time2 5.4

DQY32

Contextual Info: ADVANCE INFORMATION GVT8132P36 32K X 36 PIPELINED SRAM GALVANTECH, INC. DUAL I/O DUAL ADDRESS SYNCHRONOUS SRAM 32K X 36 SRAM +3.3V SUPPLY, FULLY REGISTERED TWO BI-DIRECTIONAL DATA BUSES FEATURES GENERAL DESCRIPTION • • • • • • • The GVT8132P36 SRAM integrates 32,768 x 36 SRAM

BL460

Abstract: 2001hi NT5SV16M16AT-75B transistor t20 nt5sv32m8at-75b NT5SV16M16AT NT5SV32M8AT NT5SV64M4AT
Contextual Info: NT5SV64M4AT L NT5SV32M8AT(L) NT5SV16M16AT(L) 256Mb Synchronous DRAM Features • • • • • • • • • • • • • High Performance: -7K 3 CL=2 -75B, CL=3 -8B, CL=2 Units fCK Clock Frequency 133 133 100 MHz tCK Clock Cycle 7.5 7.5 10 ns —