B54T Search Results

SI 122 D

Abstract: AS12E
Contextual Info: M I T E L SEMICONDUCTOR 15E D I b54T37Q OOOM'iflB 2 I MITEL* MT8940 T1/CEPT Digital Trunk PLL ISO-CMOS ST-BUS FAM ILY 91 61-002-03S-N A ISSU E 3 Features Provides T1 clock a t 1.544 M Hz locked to input fram e pulse. So u rces C EP T 30 + 2 D ig ital T ru n k/S T -B U S

IN1004

Contextual Info: I b54Tfl27 « DOmmt, cvCa ^ - c\%a^' \ # V aPeCiU *r\V>C a " ,/ ; í ^ we 7 I MITSUBISHI ADVANCED SCHOTTKY TTL M 7 4 F 1 7 5 P /F P /D P ¡IITSUBISHI ^soO'<lvP' _ -CDGTL LOGICI 07E D T -^ -o T -0? ' QUADRUPLE D-TYPE FLIP FLOP WITH RESET DESCRIPTION The M 74F175P is a semiconductor integrated circuit

Contextual Info: b54Tä2b M F 1 0 5 0 S -1 FOR DIGITAL MOBILE TELEPHONE, Rx ODEbSI S DESCRIPTION FEATURES This SA W filter for the receiving R F circuit of d ig ita l m o b ile c o m m u n ic a tio n e q u ip m e n t 1. SM D package insures small size, lightweight. 2. Adjustment free.

M74F00P

Contextual Info: i b54Tña7 ODlMOäS E ,*oOo c ' I MITSUBISHI ADVANCED SCHOTTKY TTL M 74F00P/FP/DP niTSUBISHI íDGTL LOGIC} Ó7E t ; QUADRUPLE 2-IN PU T POSITIVE NAND GATE DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74F00P is a semiconductor integrated circuit con­ sisting of four 2-i'nput positive-logic NAND gates, usable

RV10L

Contextual Info: blE D b54Tfl5S 00172m Mb'i • M ITI MITSUBISHI LSIs M5M5256VP, RV-10L,-12L,-15L, -10LL, -12LL, -15LL 2 6 2 1 4 4 -B IT 3 2 7 6 8 - WORD BY 8-B IT C M O S STATIC RAM M ITSUBISHI (M EI10R Y/ASIC) DESCRIPTION PIN C O N F IG U R A T IO N (TOP V IE W ) The M 5M 5256VP, RV are 262144-bit CMOS static RAMs

A708 Y

Contextual Info: 6248827 MITSUBISHI iDGTL LOGIC} M3 1í T S U B I S H I 91D a c v A i&e ' .a«\ev ,o^ev ^ S ]>Í1 b54TñS7 DQISSOM 7 T CDQTL Lüüiu; " 12204 D P MITSUBISHI ASTTLs - M 7 4 A S 2 4 1 P OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUT NONINVERTED DESCRIPTION Th e M 7 4 A S 2 4 1 P is a sem iconductor integ rated circuit

Contextual Info: b54Tfl2S 005434G L3T • M I T I MITSUBISHI LSIs M5M5257CP, J-15,-20,-25,-35, -20L,-25L,-35L 262144-BIT 262144-WORD BY 1-BIT CMOS STATIC RAM DESCRIPTION The M5M5257C is a family of 262144-word by 1-bit static RAMs, fabricated with the high-performance CMOS silicongate

M54823P

Abstract: frequency counter ic 12 hour digital clock M54860 M54860P m54823 M54822P digital capacitance meter m54822 DD1473
Contextual Info: MITSUBISHI BIPOLAR DIGITAL ICs M 548 60P MITSUBISHI DGTL LOGIC 31E D • b54Tfl27 0014735 4 ■ MIT3 CAR CLOCK W IT H ELAPSED T IM E COUNTER DESCRIPTION The M54860P is a semiconductor l2 L integrated circuit PIN CONFIGURATION (TOP VIEW) consisting o f a clock and trip meter functions.

s-master digital amplifier

Abstract: etri converter S-Master ECHO schematic diagrams high end amplifier schematics CDB6400 CS6400 CS6400-IQ Handsfree full duplex MCI455
Contextual Info: CS6400 Semiconductor Corporation Echo-Cancelling Codec Features General Description • Applicable in: - Digital-Cellular Hands-Free Phones - Analog-Cellular Hands-Free Phones - Office Speaker Phones - Desktop & Video Teleconferencing - Network/Base Stations

M37705E4BSP

Abstract: M37705M4B M37705E4B
Contextual Info: MITSUBISHI MICROCOMPUTERS M 37705E4BXXXSP PROM VERSION of M37705M 4BXXXSP DESCRIPTION The M37705E4BXXXSP is a sin g le -c h ip m icro com p uter d e ­ PIN CONFIGURATION TOP VIEW signe d w ith high -pe rform an ce C M O S silicon gate tech nolo­ gy. This is housed in a 64-pin shrink plastic m o ld ed DIP.

gruner RELAY

Abstract: D6450 T60403-L4097-X028-80 MT8931be gruner 740
Contextual Info: MITEL MT8931B Subscriber Network Interface Circuit CMOS ST-BUS FAMILY Preliminary Inform ation 9161-002-171-NA Features • • • • • • • • • • • • • • CCITT 1.430 and ANSI T1.605 S/T interface Full-duplex 2B + D , 192 kbit/s transmission

Contextual Info: MITSUBISHI MICROCOMPUTERS M37250M6-XXXSP M37250E6-XXXSP, M37250E6SP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for FREQUENCY SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER DESCRIPTION The M 37250M 6-X X X S P is a single-chip m icrocom puter designed w ith C M O S silicon gate technology. It is housed in a 64-pin shrink

980202 remote

Abstract: SI01DP automatic transfer switch mitsubishi
Contextual Info: MITSUBISHI MICROCOMPUTERS 38B5 Group íí'00' , ^ 0' > l > a S0!"aV SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER DESCRIPTION The 38B5 group is the 8 -bit microcomputer based on the 740 family • P W M . 14-bit X 1

Contextual Info: MITSUBISHI < DIGITAL ASSP> M 6 6 2 3 0 P /F P A2RT ADVANCED ASYNCHRONOUS RECEIVER & TRANSM ITTER DESCRIPTION The M 66230P/FP is an integrated circuit for asynchronous PIN CONFIGUP OP VIEW) serial data communications.it is used In combination with an 8-bit micro-processor and is produced using the silicongate C M OS technology.

Contextual Info: IS02-CM0S MT9196 MITEL" Integrated Digital Phone Circuit IDPC Preliminary Information Features _ ISSUE 3_ May 1995 • Programmable n-Law/A-Law CODEC and Filters • Programmable CCITT (G.711)/sign-magnitude coding

Contextual Info: CMOS MT90733 g l M DS3 Framer (DS3F IT E L Preliminary Information Features ISSUE 3 • Maps broadband payloads in the DS3 format • DS3 payload access in either bit-serial or nibble-parallel mode • C-bit parity or M13 operating mode • Separate interface for C-bits

Contextual Info: QD2 3 i m OIS • n iT l MITSUBISHI LSIs M 5 M 4 4 4 0 0 B J ,L ,T P ,R T -5 ,-6 ,-7 ,-8 ,-5 S ,-6 S ,-7 S ,-8 S FAST PAGE MODE 4194304-BIT 1048576-WORD BY 4-BIT DYNAMIC RAM DESCRIPTION This is a family of 1 048576-word by 4 -b it dynamic RAMS, fabricated with the high performance CMOS process, and is

Contextual Info: .» iJ V n V MITSUBISHI LSIS P R E U ^ 'N A R ^ M5M5408FP,TP,RT-85VL,-1 OVL, -85VLL,-Ì0VLL s°mepa,a 4194304-BIT 524288-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION The M5M5408 is 4194304-bit CMOS static RAM organized as 524288-words by 8-bit, fabricated using high-performance

M62362

Abstract: 16P2N M62362FP M62362P 1280X3
Contextual Info: MITSUBISHI<Dig.Ana.lNTERFACE> M62362P/FP 1280 RESOLUTION 3CH MULTIPLYING D-A CONVERTER PIN CONFIGURATION TOP VIEW DESCRIPTION The M62362P is an integrated circuit semiconductor of CMOS structure with 3 channels of built-in 1280 step resolution(equivalent

Contextual Info: b 2 in 3 7 Q 0 D 0 7 2 fl7 D33 • M ITC MH88524 Dual 2-4 Wire Circuit MITEL* Advance Information • • • • • • Pin Connections Full duplex operation Two complete circuits per package Transformerless 2-4 Wire 4-2 Wire conversion ± 5V operation

Contextual Info: is o 2-c m o s s t - b u s f a m ily MITEL* MT9092 Digital Telephone with HDLC HPhone-ll Features _ISSUE 2_May 1995 • Programmable p-Law/A-Law codec and filters • Programmable CCITT (G.711)/sign-magnitude coding

ST-0121

Abstract: ssc-32 cross D6t IF241 16.384MHZ sfe 5,5 ma sfe 5,5 mb MT90826 MT90826AG MT90826AL
Contextual Info: MT90826 H ITIA!fI M I T E L Quad Digital Switch Advanced Information S E M IC O N D U C T O R Features DS5197 • 4,096 x 4,096 channel non-blocking switching at 8.192 or 16.384 Mb/s • Per-channel variable or constant throughput delay • Accept ST-BUS stream s o f 2.048Mb/s,

ci la 7610

Contextual Info: MITSUBISHI ALSTTLs M 7 4 A LS 6 5 1 P 7 -52-3/ OCTAL BUS TRANSCEIVER/REGISTER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 91 D 12674 (DGTL LOGIC ) DESCRIPTION The M74ALS651P is a semiconductor integrated circuit consisting of eight bus transceiver/registers with 3-state

8 pin dip j k flipflop ic

Abstract: M74ALS04
Contextual Info: M IT S U B IS H I A L S T T L s , M 7 4 A L S 6 4 0 A - 1 P - 7 - - 5 3 .- 3 1 OCTAL BUS TR A N SC EIVER W IT H 3 -S T A T E O U TPU T IN V E R T E D ' 6249827 MITSUBISHI (DGTL L O GI C) DESCRIPTION The M 74ALS640A-1P is a semiconductor integrated cir­