B869 Search Results

aui rj45

Abstract: pe-65746 m-tron mp-1 pe-65994 PE65746 m-tron mp-1 crystal oscillator fil-mag 23z128 SM23Z90 PE64502 SM603
Contextual Info: B86961 /M B86961A FUJITSU UNIVERSAL INTERFACE FOR 10BASE -T TWISTED-PAIR ETHERNET JANUARY 1995 Revised 3/97 DATASHEET Note: All descriptions apply to both B86961 and B86961A unless otherwise noted. DB15 (AUI) and RJ45 (10BASE-T) connections to an Ethernet local area network. Functions provided by the

B86931

Abstract: MB86931
Contextual Info: C h a pter A4 M B86931 Serial Data Transmitters And Receivers The B86931 features two independent serial communication units designated SDTRO and SDTR1. The SDTRs support synchronous and asynchronous data transfer modes, and are program-compatible with existing industry-standard

Contextual Info: M B86934 FUJITSU B8693X 32-BIT RISC EMBEDDED PROCESSOR September 2 1 ,1 9 9 4 PRELIMINARY INFORMATION FEATURES_ _ • 60 MHz operating frequency • SPARC» high performance RISC architecture • High Performance SPARC FPU, ANSI/IEEE 754

Contextual Info: M B86960 F ilim i! NETWORK INTERFACE CONTROLLER with ENCODER/DECODER NICE DATASHEET A P R IL I 9 9 3 FEA TU R ES • High-performance packet buffer architecture pipe­ lines data for highest throughput • 20 Mbyte/second datatransferrate to/from thesystem

Contextual Info: MftS 2 2 FUJITSU M B86962 10BASE-T TRANSCEIVER FOR TWISTED PAIR ETHERNET FEBRUARY 1991 PRELIMINARY DATA SHEET face permits capacitive coupling to the external Manchester encoder/decoder, eliminating the isola­ tion coupling transformer usually required at that in­

Contextual Info: M B 8 6 9 6 5 A/M B 8 6 9 6 5 B FUJITSU ETHERCOUPLER SINGLE-CHIP ETHERNET CONTROLLER DATASHEET Note: All descriptions apply to both the M B86965A and B86965B FEATURES • Provides interface to the I/O bus of PC/XT /AT or compatible computers • Optional, generic host interface to connect to industrystandard microprocessor buses

Contextual Info: M B86936 FUJITSU 930 SERIES 32-BIT RISC EMBEDDED PROCESSOR APRIL, 1996 • On-chip clock generator circuit FEATURES • JTAG test interface • 25 and 50 MHz versions • Emulator support hardware • Clock doubler for 50 MHz version • Single vector trapping

MB86950

Abstract: etherstar
Contextual Info: FUJITSU MICROELECTRONICS M7E D m 374*Ì7L2 001770^ b • F M I cP M B86953 DATA SHEET JANUARY 1992 FEA TU R E S_ IO E N E R A Ï. D E S C R IP T IO N _ • C om panion chip for M B 8 6 9 5 0 EtherStar and M B 8 6 9 6 0 NICE™ Ethernet LA N Controllers

Contextual Info: M B86933H-20_ FUJITSU 930 Series 32-BIT RISC EMBEDDED PROCESSOR JU N E 1995 GENERAL DESCRIPTION • • 374T7SL 20 M H z 50ns/cycle operating frequency SPARC V8 high-perform ance RISC architecture The M B86933H -20 is targeted toward applications

MB86950 Etherstar Ethernet Controller

Abstract: MB86950 MBL8392A
Contextual Info: FEATURES DESCRIPTION • C om panion chip for M B 86950 EtherStar or M B86960 NICE™ Ethernet LAN controllers • Provides interface between controller and IBM PC, XT or AT bus • Substantially reduces parts count for LAN adapter • 8- and 16-bit bus capability

77116

Abstract: L142 V7-3S17D8-048 C0-76305
Contextual Info: CATALOG MICRO SWITCH FED.M FG .CO DE V 7 — 3 S 1 7 D 8 -0 4 8 SWITCH-BASIC a Honeywell Division L I ST ING CW -B8692 91929 00 1 o o - Q s f c EC/ o -h o J I - 2 1 ^ O 5 > S < 040 CL .235 MAX -1 PRETRAVEL 0 .114*.002 HOLE „ I— .116 *.015 1 I— .24-

pinouts aui db15

Abstract: PM6501 fujitsu ten ECU IC 74ALS245 application 161 0M
Contextual Info: M B86965 _ FUJITSU ETHERCOUPLER SINGLE-CHIP ETHERNET CONTROLLER DATA S H E E T A P R IL 1 9 9 3 FEATURES daughter and m otherboards, as w ell as expansion-bus adapter boards. An E E P R O M can be interfaced to the chip for storage o f E thernet ID and configuration set­

Contextual Info: M B86964 FUJITSU ETHERNET CONTROLLER WITH 10BASE-T TRANSCEIVER PRELIMINARY DATA SHEET DECEMBER 1993 M B 8 6 9 6 4 ’s transm it buffer is p ro g ram m a b le as a single i FEATURES F ully co m p lian t w ith IS O /A N S I/IE E E 8802-3 sp ecific a­ tions

86961

Abstract: opa 961 86-96-1 m-tron mp-1 99 20 44 m-tron mp-1 SM23Z90 PE64502 SM603
Contextual Info: FUJITSU M B 8 6 961 / M B 8 6 9 6 1 A U NIV ER SAL INTERFACE FOR 1 OBASE TWISTED-PAIR E H T E R N E T DATASHEET Note: JANUARY 1995 Note: A ll descriptions apply to both B86961 and M B86961A unless otherwise noted. DB15 (AUI) and RJ45 (10BASE-T) connections to an

PE-65746

Abstract: SM603 PE65746
Contextual Info: B86961/B86961A FUJITSU UNIVERSAL INTERFACE FOR 10BASE-T TWISTED-PAIR ETHERNET APRILI 993 DATA SHEET controller and the DB15 (AUI) and R J45 (10BASE-T) connections to an Ethernet local area network. Func­ tions provided by the M B86961(A) include Manchester

Contextual Info: Ordering number : EN8923B Bi-CMOS IC LV23100AT For Portable Audio System 1-chip Tuner IC Incorporating PLL Overview The LV23100V is a one-chip tuner IC incorporating PLL for portable audio system. Functions • AM tuner • FM tuner • MPX stereo decoder

Contextual Info: xDSL WAN Ethernet Bridge Controller M B 86976 Package • 144-pin, plastic QFP • FPT-144P-M03 ► Descrip tio n The Fujitsu MB 86976 xDSL WAN Ethernet Bridge Controller is a CMOS VLSI device designed for LAN-WAN bridging applications. It offers a high level of integration that

Contextual Info: C h a pt er E10 Floating-Point Unit E10.1 Overview of the B86936 Floating-Point Unit The B86936 FPU fully conforms to the A N SI/IEEE Standard 754-1985, the SPARC Architecture Version 8 specification, and he SPARC IEEE754 Implementation Recommendation except for the Nonstandard FP (NS=1 mode implementation.

Contextual Info: MB86833 SPARCIite SERIES 32-BIT RISC EMBEDDED PROCESSOR FUJITSU DATASHEET MARCH 1998 FEATURES Programmable address decoder and wait-state genera­ tor Single vector trapping • 66 M Hz CPU with on-chip clock multiplier 0.35 micron gate, 2-level metal CMOS technology,

Contextual Info: B86935 Bus Interface Unit H3.1 Overview of Bus Interface Unit The BIU on the B86935 includes all the features of the B86930, and in addition offers the following: • Option to run core at double the frequency of the Bus Interface Unit, • Four-word burst mode for instruction fetches and data loads,

Contextual Info: Ordering number : ENA0245 LA73054 Monolithic Linear IC Video Signal Driver for DVD Player http://onsemi.com Overview The LA73054 is a video signal driver for DVD player. Functions • 6 Channel • Clamp • Amplifier • 75Ω driver • Y/C-MIX • Output Mute

LA4263

Contextual Info: Ordering number : ENA0014 Monolithic Linear IC LA4263 Power Amplifiers in TV and Audio Systems Overview LA4263 is a power amplifiers in TV and audio systems. Functions • Standby mode switch. • Thermal protection circuit. Specifications Maximum Ratings at Ta = 25°C

MARKING cfk

Abstract: marking code CFK MB86936A
Contextual Info: B86936 FUJITSU 930 SERIES 32-BIT RISC EMBEDDED PROCESSOR AUGUST, 1996 • • • • JTAG test interface Emulator support hardware Single vector trapping Power down modes, with global or selective power down • 0.5 micron gate, 3 level metal CMOS technology,

Contextual Info: B86932 FUJITSU SPARCIite 32-BIT RISC EMBEDDED PROCESSOR MAY 25, 1994 FEATURES • 4 0 M H z 2 5 n s/cy cle operating frequency • SPARC high perform ance R IS C architecture • 8 K by tes 2 -way set associative instruction cach e • 2 K bytes 2 - way set associative data cache