B86960 Search Results

Contextual Info: M B86960 F ilim i! NETWORK INTERFACE CONTROLLER with ENCODER/DECODER NICE DATASHEET A P R IL I 9 9 3 FEA TU R ES • High-performance packet buffer architecture pipe­ lines data for highest throughput • 20 Mbyte/second datatransferrate to/from thesystem

MB86950 Etherstar Ethernet Controller

Abstract: MB86950 MBL8392A
Contextual Info: FEATURES DESCRIPTION • C om panion chip for M B 86950 EtherStar or M B86960 NICE™ Ethernet LAN controllers • Provides interface between controller and IBM PC, XT or AT bus • Substantially reduces parts count for LAN adapter • 8- and 16-bit bus capability

MB86964

Abstract: eDP timing control VESA CIP 8D Decoder "aui transformers" SQFP100 100-PIN BA10 BA11 BA12 FPT-100-M05
Contextual Info: FUJITSU MB86964 ETHERNET CONTROLLER WITH 10BASE-T TRANSCEIVER PRELIMINARY DATA SHEET FEATURES Fully compliant with ISO/ANSI/IEEE 8802-3 specifica­ tions Provides generic interface to industry-standard micropro­ cessor busses X86, 680X0 and RISC High-performance packet-buffer architecture pipelines

Contextual Info: MB86961A FUJITSU UNIVERSAL INTERFACE FOR 10BASE -T DECEMBER 1997 DATASHEET FEATURES • Full-duplex capability • Combines Manchester encoder/decoder and twisted pair transceiver functions • Direct interface to all popular Ethernet controllers • Direct interface to AUI and 10BASE-T outputs

Contextual Info: MB86961/MB86961A FUJITSU UNIVERSAL INTERFACE FOR 10 BASE-T TWISTED-PAIR ETHERNET DATA SHEET JANUARY 1995 Note: All descriptions apply to both MB86961 and MB86961A unless otherwise noted. FEATURES • Combines Manchester encoder/decoder and twisted pair transceiver functions

Contextual Info: P rod uct S p e cificatio n JANUARY 1999 Revision 1.5 LXT908 Universal 3.3V 10BASE-T and AUI Transceiver General Description Features The LXT908 Universal 10B ASE-T and AUI Transceiver is designed for IEEE 802.3 physical layer applications. It provides all the active circuitry to interface most standard

86961

Abstract: opa 961 86-96-1 m-tron mp-1 99 20 44 m-tron mp-1 SM23Z90 PE64502 SM603
Contextual Info: FUJITSU M B 8 6 961 / M B 8 6 9 6 1 A U NIV ER SAL INTERFACE FOR 1 OBASE TWISTED-PAIR E H T E R N E T DATASHEET Note: JANUARY 1995 Note: A ll descriptions apply to both MB86961 and M B86961A unless otherwise noted. DB15 (AUI) and RJ45 (10BASE-T) connections to an

RPY 86

Abstract: BUT16
Contextual Info: M B 86960 FUJITSU N E T W O R K INTERFACE CO N T R O L L E R with E N C O D E R / D E C O D E R NICE DATASHEET FEATURES High-performance packet buffer architecture pipe­ lines data for highest throughput 20 Mbyte/second data transferrate to/from the system

Contextual Info: FUJITSU MB86964 ETHERNET CONTROLLER WITH 10BASE-T TRANSCEIVER PRELIMINARY DATA SHEET FEATURES Fully compliant with ISO/ANSI/IEEE 8802-3 specifica­ tions Provides generic interface to industry-standard micropro­ cessor busses X86, 680X0 and RISC High-performance packet-buffer architecture pipelines

Valor ST7032

Abstract: m-tron mp-1 ST7032 driver st7011 pe-65994 fil-mag 23z128 LXT907 tg4220 VALOR pt4069 SM23Z90
Contextual Info: LXT907 Ethernet Interface for Hub, Switch & Adapter Applications Advance Information December 1993 LXT907 Ethernet Interface for Hub, Switch and Adapter Applications Internal MAU with Integrated 10Base T MAU, EnDec, AU I and Filters General Description Key Features

NS8390

Abstract: VALOR pt4069 LT6030 86961A Fujitsu APD "aui transformers" Valor ECSM20 MB86961APD-G MB86961A
Contextual Info: MB86961A FUJITSU UNIVERSAL INTERFACE FOR 10BASE -T SEPTEMBER 1999 DATASHEET FEATURES • Full-duplex capability • Combines Manchester encoder/decoder and twisted pair transceiver functions • Direct interface to all popular Ethernet controllers • Direct interface to AUI and 10BASE-T outputs

29F400TA

Abstract: FLC31SVC6S MB90P263 15E03L 81V4405C 29lv800ta MB3799 B566 MB47082 29LV800BA
Contextual Info: Index Page Document code Series Series Series Series Series 33 35 36 37 31 - CG51 Series D 5 C B Series D1 F1 Series F2 Series F3 Series 32 112 113 113 113 D S0 4 -2 3 1 1 1 -1 E D S0 4 -2 0 1 0 0 -3 E D S0 4 -2 0 1 0 0 -3 E D S0 4 -2 0 1 0 0 -3 E F4C Series (T1)

UUU1

Contextual Info: DATA SHEET APRIL 1997 Revision 2.0 LXT905 Twisted-Pair Ethernet Interface Adapter Q >M M l P l M rtp llB H The LXT905 Twisted-Pair Ethernet Interface Adapter is designed for IEEE 802.3 physical layer applications. It provides, in a single CMOS device, ail the active circuitry

PE-65746

Abstract: SM603 PE65746
Contextual Info: MB86961/MB86961A FUJITSU UNIVERSAL INTERFACE FOR 10BASE-T TWISTED-PAIR ETHERNET APRILI 993 DATA SHEET controller and the DB15 (AUI) and R J45 (10BASE-T) connections to an Ethernet local area network. Func­ tions provided by the M B86961(A) include Manchester