BANK Search Results

SMOS182

Contextual Info: TMS626802, TMS636802 1048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS182 - FEBRUARY 1994 TM S626802 LVTTL DGE PACKAGE (TO P VIE W ) 3.3-V Power Supply (10% Tolerance) Two Banks for On-Chip Interleaving (Gapless Accesses) vcc [ 1

37C15

Contextual Info: TCM37C13, TCM37C14, TCM37C15 PCM COMBO WITH PROGRAMMABLE GAIN CONTROL S L W S 0 1 8 - JUNE 1996 • Meets CCITT/ D3/D4 Channel Bank Recommendations for Input Signals Greater than -5 5 dBmO • Programmable Transmit and Receive Gain Control with Pin-Selectable

Contextual Info: bq2204A X4 SRAM Nonvolatile Controller Unit General Description Features ä Power monitoring and switching for 3-volt battery-backup applications ä Write-protect control ä 2-input decoder for control of up to 4 banks of SRAM ä 3-volt primary cell inputs

Contextual Info: Quality Semiconductor, I nc. QS5940 SuperSync PCI Controller PLL Clock Driver PRELIMINARY FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • QS5940 is a high-performance, low skew, low jitter phase-locked loop PLL clock driver. Two banks of

45VM32160D

Contextual Info: IS42/45VM32160D 4M x 32Bits x Banks Mobile Synchronous DRAM Description These IS42/45VM32160D are mobile 536,870,912 bits CMOS Synchronous DRAM organized as 4 banks of 4,194,304 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are

SM81600E

Abstract: IS42SM16800E IS42SM81600E IS42SM16800E-7TLI IS42SM32400E IS42SM32400E-7T IS42SM16800E-7BLI
Contextual Info: IS42SM81600E / IS42SM16800E / IS42SM32400E IS42RM81600E / IS42RM16800E / IS42RM32400E 16Mx8, 8Mx16, 4Mx32 128Mb Mobile Synchronous DRAM APRIL 2011 DESCRIPTION FEATURES • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access and precharge

IS42VS16100E

Abstract: 42VS16100E IS42VS16100E-75BLI
Contextual Info: IS42VS16100E 512K Words x 16 Bits x 2 Banks 16Mb SYNCHRONOUS DYNAMIC RAM FEATURES • Clock frequency: 133, 100, 83 MHz • Fully synchronous; all signals referenced to a positive clock edge • Two banks can be operated simultaneously and independently • Dual internal bank controlled by A11

74ALS6302

Abstract: la 7184 74ALS6301 M 6302 XP 74als630
Contextual Info: SN74ALS6301, SN74ALS6302 DYNAMIC MEMORY CONTROLLERS D 2 9 0 0 . JA N U A R Y 1 9 8 6 —REVISED M A R C H 1 9 8 8 Provides Control for 16K, 64K. 256K, and 1M Dynamic RAMs SN 74ALS6301, S N 7 4A LS 6 30 2 . . Highest-Order Two-Address Bits Select One of Four Banks of RAMs

W9825G6JH

Abstract: A-04 w9825g6jh-6l w9825g6jh-6
Contextual Info: W9825G6JH 4 M  4 BANKS  16 BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3

Contextual Info: AVED MEMORY PRODUCTS Where Quality & Memory Merge AMP377P3323AT2-C1H/H 32M X 72 SDRAM DIMM with PLL & Register based on 16M X 8, 4 Banks, 4K REFRESH, 3.3V Synchronous DRAMs WITH SPD DESCRIPTION AVED Memory Products AMP377P3323AT2-C1H/H is a 32M bit X 72 Synchronous Dynamic RAM high density memory

74605

Contextual Info: AVED MEMORY PRODUCTS Where Quality & Memory Merge AVED16P664LS49-C75 16M X 64 SDRAM DIMM based on 16M X 8, 4 Banks, 4K REFRESH, 3.3V Synchronous DRAMs WITH SPD DESCRIPTION AVED Memory Products AVED16P664LS49-C75 is a 16M bit X 64 Synchronous Dynamic RAM high density memory module. The AVED Memory Products AVED16P664LS49-C75

Contextual Info: AVED MEMORY PRODUCTS Where Quality & Memory Merge AMP366P1723AT2-C1H 16M X 64 SDRAM DIMM based on 16M X 8, 4 Banks, 4K REFRESH, 3.3V Synchronous DRAMs WITH SPD DESCRIPTION AVED Memory Products AMP366P1723AT2-C1H is a 16M bit X 64 Synchronous Dynamic RAM high density memory module. The AVED Memory Products AMP366P1723AT2-C1H

Contextual Info: AVED MEMORY PRODUCTS Where Quality & Memory Merge AMP366P1623BTE-C75/H 16M X 64 SDRAM DIMM, Unbuffered, based on 8M X 8, 4 Banks, 4K Refresh, 3.3V Synchronous DRAMs WITH SPD DESCRIPTION AVED Memory Products AMP366P1623BTE-C75/H is a 16M bit X 64 Synchronous Dynamic RAM high density memory

Contextual Info: AVED MEMORY PRODUCTS Where Quality & Memory Merge AMP374P1723AT2-C1L 16M X 72 SDRAM DIMM with ECC based on 16M X 8, 4 Banks, 4K REFRESH, 3.3V Synchronous DRAMs WITH SPD DESCRIPTION AVED Memory Products AMP374P1723AT2-C1L is a 16M bit X 72 Synchronous Dynamic

Contextual Info: PI6C49S1504 High Performance Selectable 1:4 Differential Fanout Buffer Features Description ÎÎ4 differential outputs with 2 banks The PI6C49S1504 is a high performance fanout buffer devicewhich supports up to 1.5GHz frequency. The device also uses Pericom's proprietary input detection technique to make sure

Contextual Info: AVED MEMORY PRODUCTS Where Quality & Memory Merge AMP366P1723BT2-C75 16M X 64 SDRAM DIMM based on 16M X 8, 4 Banks, 4K REFRESH, 3.3V Synchronous DRAMs WITH SPD DESCRIPTION AVED Memory Products AMP366P1723BT2-C75 is a 16M bit X 64 Synchronous Dynamic RAM high density memory module. The AVED Memory Products AMP366P1723BT2-C75

Contextual Info: AVED MEMORY PRODUCTS Where Quality & Memory Merge AMP374P3323CT2-C75 32M X 72 SDRAM DIMM with ECC based on 16M X 8, 4 Banks, 4K REFRESH, 3.3V Synchronous DRAMs WITH SPD DESCRIPTION AVED Memory Products AMP374P3323CT2-C75 is a 32M bit X 72 Synchronous Dynamic

Contextual Info: Type 945U High Current Screw Terminal Capacitors Metallized Polypropylene Dielectric Type 945U uses advanced metalized film technology to achieve long-life, high reliability in DC link applications. High voltage and high current ratings packaged in screw-terminal cases allow for replacement of series-parallel banks of aluminum

W9425G6JH

Contextual Info: W9425G6JH 4 M  4 BANKS  16 BITS DDR SDRAM Table of Contents1. GENERAL DESCRIPTION . 4 2. FEATURES . 4

AS4SD32M16

Contextual Info: SDRAM AS4SD32M16 512Mb: 32 Meg x 16 SDRAM PIN ASSIGNMENT Top View Synchronous DRAM Memory 54-Pin TSOP FEATURES • Full Military temp (-55°C to 125°C) processing available • Configuration: 32 Meg x 16 (8 Meg x 16 x 4 banks) • Fully synchronous; all signals registered on positive

Contextual Info: SY89538L 3.3V Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay General Description The SY89538L integrated programmable clock synthesizer and fanout is part of a precision PLLbased clock generation family optimized for

MICRON BGA PART MARKING

Contextual Info: 288Mb: x9, x18, x36 2.5V VEXT, 1.8V VDD, HSTL, CIO, RLDRAM 2 Features CIO RLDRAM 2 MT49H32M9 – 32 Meg x 9 x 8 Banks MT49H16M18 – 16 Meg x 18 x 8 Banks MT49H8M36 – 8 Meg x 36 x 8 Banks Features Options1 • 533 MHz DDR operation 1.067 Gb/s/pin data rate

Contextual Info: 2.5V, 2GHz ANY DIFF. IN-TO-LVDS Precision Edge SY89872U PROGRAMMABLE CLOCK DIVIDER/FANOUT Final BUFFER WITH INTERNAL TERMINATION FEATURES DESCRIPTION • Guaranteed AC performance over temperature and voltage: • >2GHz FMAX • < 750ps Tpd matched delay between banks

Contextual Info: SDRAM AS4SD2M32 512K x 32 x 4 Banks 64-Mb PIN ASSIGNMENT (Top View) Synchronous SDRAM 86-Pin TSOPII FEATURES • Full Military temp (-55°C to 125°C) processing available • Configuration: 512K x 32 x 4 banks • Fully synchronous; all signals registered on positive