BG209 Search Results

Contextual Info: BG2097-642 Diodes Miscellaneous Diode Semiconductor MaterialSilicon Package StyleAssembly Mounting StyleT DescriptionH.V. Tripler;Vi p-p 8.6kV;VO 25kV;IO 1.5mA;w/focus Potentiometer

Diagrams

Abstract: 5185143 BG-272 mold cap BG256 BG352 BG-209 Package Diagrams 14X22
Contextual Info: Package Diagrams Ball Grid Array Packages 119-Lead PBGA 14 x 22 x 2.4 mm BG119 51-85115-*A 1 Package Diagrams 209-Lead PBGA (14 x 22 x 2.20 mm) BG209 51-85143-*A 2 Package Diagrams 256-Lead PBGA (27 x 27 x 2.33 mm) BG256 51-85097-*A 3 Package Diagrams 272-Lead Ball Grid Array (27 x 27 x 2.33 mm) BG272

Contextual Info: BG2097-641 Diodes Miscellaneous Diode Semiconductor MaterialSilicon Package StyleAssembly Mounting StyleT DescriptionH.V. Tripler;Vi p-p 8.6kV;VO 25kV;IO 1.5mA;w/focus resistor

CY7C1461V25

Abstract: CY7C1463V25 CY7C1465V25
Contextual Info: CY7C1461V25 CY7C1463V25 CY7C1465V25 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-Thru SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between Write and Read cycles •Supports 133-MHz bus operations •1M x 36/2M × 18/512K × 72 common I/O

Contextual Info: CY7C1480V33 CY7C1482V33 CY7C1486V33 ADVANCE INFORMATION 2M x 36/4M x 18/1M x 72 Pipelined SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 300, 250, 200, and 167 MHz Provide high-performance 3-1-1-1 access rate

Contextual Info: CY7C1441AV25 CY7C1443AV25 CY7C1447AV25 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 2.5V core power supply • 2.5V/1.8V I/O power supply

Contextual Info: CY7C1441AV33 CY7C1443AV33 CY7C1447AV33 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 3.3V core power supply • 2.5V or 3.3V I/O power supply

CY7C1440V33

Contextual Info: CY7C1440V33 CY7C1442V33 CY7C1446V33 PRELIMINARY 1M x 36/2M x 18/512K x 72 Pipelined SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 250, 200, and 167 MHz Provide high-performance 3-1-1-1 access rate Fast access time: 2.7, 3.0 and 3.5 ns

CY7C1441AV33

Abstract: CY7C1443AV33 CY7C1447AV33
Contextual Info: CY7C1441AV33 CY7C1443AV33 CY7C1447AV33 PRELIMINARY 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 3.3V –5% and +10% core power supply (VDD)

CY7C1440AV33

Abstract: CY7C1442AV33 CY7C1446AV33
Contextual Info: CY7C1440AV33 CY7C1442AV33 CY7C1446AV33 36-Mbit 1 M x 36/2 M × 18/512 K × 72 Pipelined Sync SRAM 36-Mbit (1 M × 36/2 M × 18/512 K × 72) Pipelined Sync SRAM Features Functional Description • Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200 and 167 MHz

L1131

Abstract: CY7C1441AV25 CY7C1443AV25 CY7C1447AV25
Contextual Info: CY7C1441AV25 CY7C1443AV25 CY7C1447AV25 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 2.5V core power supply • 2.5V/1.8V I/O power supply

CY7C1440AV25

Abstract: CY7C1442AV25 CY7C1446AV25
Contextual Info: CY7C1440AV25 CY7C1442AV25 CY7C1446AV25 36-Mbit 1M x 36/2M x 18/512K x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation

CY7C1441AV33

Abstract: CY7C1443AV33 CY7C1447AV33
Contextual Info: CY7C1441AV33 CY7C1443AV33,CY7C1447AV33 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Features Functional Description • Supports 133-MHz bus operations ■ 1M x 36/2M x 18/512K x 72 common IO ■ 3.3V core power supply ■ 2.5V or 3.3V IO power supply

ZB4BZ62

Abstract: ZB6-Y009 4458D XB4BA31 XB4BD xb4bw3 XB4BD25 XB4BS542 xeng1191 ZB4BZ1905
Contextual Info: Push Buttons and Operator Interface 16 mm XB6 22 mm XB4 22 and 30 mm Most Common Complete Operators Class 9001 Type K, SK—30 mm and XB4-XB5 22 mm most common complete operators assembled with contact blocks and suggested legend plates. Start-Stop and Hand-Of-Auto are just a few of the configurations

CY7C1443V33

Abstract: CY7C1441V33
Contextual Info: CY7C1441V33 CY7C1443V33 CY7C1447V33 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-through SRAM Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • Fast clock-to-output times — 6.5 ns for 133-MHz device — 7.5 ns (for 117-MHz device)

Contextual Info: CY7C1441AV33 36-Mbit 1 M x 36 Flow-Through SRAM 36-Mbit (1 M × 36) Flow-Through SRAM Features Functional Description • Supports 133-MHz bus operations ■ 1 M × 36 common I/O ■ 3.3 V core power supply ■ 2.5 V or 3.3 V I/O power supply ■ Fast clock-to-output times

cy7c1441av33-133axi

Abstract: R1136 CY7C1441
Contextual Info: CY7C1441AV33 CY7C1443AV33, CY7C1447AV33 36-Mbit 1 M x 36/2 M × 18/512 K × 72 Flow-Through SRAM 36-Mbit (1 M × 36/2 M × 18/512 K × 72) Flow-Through SRAM Features Functional Description • Supports 133-MHz bus operations ■ 1 M × 36/2 M × 18/512 K × 72 common IO

CY7C1441V33

Abstract: CY7C1443V33
Contextual Info: CY7C1441V33 CY7C1443V33 CY7C1447V33 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-Thru SRAM Features inputs include all addresses, all data inputs, addresspipelining Chip Enable CE , Burst Control Inputs (ADSC, ADSP, and ADV), Write Enables (BWa, BWb, BWc, BWd,

SAMPLE HOLD

Abstract: CY7C1440V33
Contextual Info: 440V33 CY7C1440V33 CY7C1442V33 CY7C1446V33 PRELIMINARY 1M x 36 / 2M x 18 / 512K x 72 Pipelined SRAM Features • • • • • • • • • • • • • • • • inputs include all addresses, all data inputs, address-pipelining Chip Enable CE , burst control inputs (ADSC, ADSP, and

CY7C1440AV25

Abstract: CY7C1442AV25 CY7C1446AV25
Contextual Info: CY7C1440AV25 CY7C1442AV25 CY7C1446AV25 36-Mbit 1M x 36/2M x 18/512K x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation

cy7c1470v25

Contextual Info: CY7C1470V25 CY7C1472V25 CY7C1474V25 ADVANCE INFORMATION 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency™, no dead cycles between Write and Read cycles • Fast clock speed: 300, 250, 200, and 167 MHz • Fast access time: 2.2, 2.4, 3.0, and 3.4 ns

Contextual Info: CY7C1440AV33 CY7C1442AV33 CY7C1446AV33 PRELIMINARY 36-Mbit 1M x 36/2M x 18/512K x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200,167 MHz • Registered inputs and outputs for pipelined operation

Contextual Info: CY7C1441AV33 CY7C1443AV33 CY7C1447AV33 PRELIMINARY 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 3.3V –5% and +10% core power supply (VDD)

transistor f6 13003

Abstract: equivalent transistor bj 131-6 transistor Eb 13003 BM BB112 smd TRANSISTOR code marking 2F 6n a1211 lg CQY58 BU705 TRANSISTOR 131-6 BJ 026 philips om350
Contextual Info: W IDEBAND TRANSISTORS AND W IDEBAND HYBR ID 1C MODULES page P refa ce. 3 Selection guide Wideband transistors.