BULL CP8 Search Results

Contextual Info: TO SHIBA TMPN3120E1M TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T M P N 3 1 20E1 M Neuron Chip For Distributed Intelligent Control Networks L o n W o r k s ® The TMPN3120E1M is a Neuron Chip which configures Lo n W o r k s nodes on a single chip.

bull cp8

Abstract: 2832 eeprom IC 2832 eeprom TMPN3150B1AF eeprom ic 2832 eePROM 2832
Contextual Info: TOSHIBA TMPN3150B1AF TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TMPN31 5 0 B 1A F Neuron Chip For Distributed Intelligent Control Networks L o n W o r k s ® The TMPN3150B1AF is a Neuron Chip which configures Lo n W orks nodes in combination with external memory.

Contextual Info: TO SH IBA TMPN3120E1M TO SHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TMPN31 2 0 E 1 M Neuron Chip For Distributed Intelligent Control Networks iLr>NW \ — —-•- - -nRK<;®l - ■ ■ ■ / The TMPN3120E1M is a Neuron Chip which configures

s/ksmh12/2.27/30/ecg philips semiconductor master book

Contextual Info: TOSHIBA TENTATIVE TMPN3120A20M TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TMPN3120A20M Neuron chip LSI for Distributed Intelligent Control Networks LON The Neuron Chip TMPN3120A20M provides double the performance of previous Neuron Chips. It supports a

TMPN3150B1AF

Contextual Info: TO SH IBA TMPN3150B1AF TO SHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TMPN31 5 0 B 1A F Neuron Chip For Distributed Intelligent Control Networks iLr>NW \ — —-•- - -nRK<;®l -■■■ g The TMPN3150B1AF is a Neuron Chip which configures

ST19

Abstract: ST19SF08
Contextual Info: ST19SF08 CMOS MCU Based Safeguarded SMARTCARD With 8 KBytes EEPROM DATA BRIEF Figure 1. Delivery Form 4 4 4 4 PRODUCT FEATURES • ENHANCED 8 BIT CPU WITH EXTENDED ADDRESSING MODES ■ 32 KBYTES OF USER ROM WITH PARTITIONING ■ SYSTEM ROM FOR LIBRARIES ■ 960 BYTES OF USER RAM WITH

ST16

Abstract: ST16-19HDSE ST16601
Contextual Info: ST16601 Smartcard MCU With 1088 Bytes EEPROM DATA BRIEF 1 K Byte of SYSTEM ROM • 128 Bytes of RAM ■ 1088 Bytes of EEPROM, SECTOR COMBINATIVE 3 ■ Figure 1. Delivery Form 3 6 K Bytes of USER ROM, SECTOR COMBINATIVE 3 8 BIT ARCHITECTURE CPU ■ 3 ■ – Highly reliable CMOS EEPROM technology

ST16

Abstract: ST16R820 Antenna Coil
Contextual Info: ST16R820 CONTACTLESS ISO 14443-B SAFEGUARDED Smartcard IC WITH 576 Bytes EEPROM DATA BRIEF • 8-BIT ARCHITECTURE CPU ■ 8 KBytes of USER ROM, SECTOR COMBINATIVE ■ SYSTEM ROM ■ 192 Bytes of RAM ■ 576 Bytes of EEPROM, SECTOR COMBINATIVE – Highly reliable CMOS EEPROM technology

ST19

Abstract: ST19SF04
Contextual Info: ST19SF04 CMOS MCU Based Safeguarded SMARTCARD With 4 KBytes EEPROM DATA BRIEF Figure 1. Delivery Form 4 4 4 4 PRODUCT FEATURES • ENHANCED 8 BIT CPU WITH EXTENDED ADDRESSING MODES ■ 32 KBYTES OF USER ROM WITH PARTITIONING ■ SYSTEM ROM FOR LIBRARIES ■ 960 BYTES OF USER RAM WITH

s/ksmh12/2.27/30/ecg philips semiconductor master book

Contextual Info: TMPN3120A20U TO SHIBA TENTATIVE TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TMPN31 20A20U Neuron chip LSI for Distributed Intelligent Control Networks LON The Neuron Chip TMPN3120A20U provides double the performance of previous Neuron Chips. It supports a

Contextual Info: TO SHIBA TENTATIVE TMPN3120FE5M TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT T M P mN'm • ■v ■ ■ 31 9 mm m SILICON MONOLITHIC H F F S M v ■v ■ Neuron chip LSI for Distributed Intelligent Control Networks LON The Neuron Chip TMPN3120FE5M provides double the

ST16

Abstract: ST16-19HDSE ST16SF42 bull cp8
Contextual Info: ST16SF42 Smartcard MCU With 2048 Bytes EEPROM DATA BRIEF 1.5 K Byte of SYSTEM ROM • 384 Bytes of RAM ■ 2048 Bytes of EEPROM, SECTOR COMBINATIVE 4 ■ Figure 1. Delivery Form 4 16 K Bytes of USER ROM, SECTOR COMBINATIVE 4 8 BIT ARCHITECTURE CPU ■ 4 ■

ST19

Abstract: ST19SF02
Contextual Info: ST19SF02 CMOS MCU Based Safeguarded SMARTCARD With 2 KBytes EEPROM DATA BRIEF Figure 1. Delivery Form 4 4 4 4 PRODUCT FEATURES • ENHANCED 8 BIT CPU WITH EXTENDED ADDRESSING MODES ■ 32 KBYTES OF USER ROM WITH PARTITIONING ■ SYSTEM ROM FOR LIBRARIES ■ 960 BYTES OF USER RAM WITH

ST16F48

Abstract: ST16xyz
Contextual Info: ST16F48 CMOS MCU BASED SAFEGUARDED SMART CARD IC WITH 8176 Bytes EEPROM BRIEF DATA • ■ ■ ■ – – – – – – ■ ■ ■ ■ ■ ■ ■ 8 BIT ARCHITECTURE CPU 16 KBytes of ROM 288 Bytes of RAM 8176 Bytes of EEPROM, SECTOR COMBINATIVE Highly reliable CMOS EEPROM technology

IC TIMER HIGH FREQUENCY 20MHZ

Abstract: TMPN3120FE3M
Contextual Info: TO SHIBA TENTATIVE TMPN3120FE3M TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TMPN31 20FE3M Neuron Chip For Distributed Intelligent Control Networks L o n W o r k s ® The Neuron Chip TMPN3120FE3M provides double the performance of previous Neuron Chips. It supports a

LON neuron 3120

Contextual Info: TO SHIBA TENTATIVE TMPN3120A20M TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT T • M ■v ■ P ■ N m 'm 3 mm 1 m ? f l A m SILICON MONOLITHIC m 9 n w M ■v ■ Neuron chip LSI for Distributed Intelligent Control Networks LON The Neuron Chip TMPN3120A20M provides double the

diode matrix rom

Abstract: ST16 ST16-19HDSE ST16SF41
Contextual Info: ST16SF41 Smartcard MCU With 1344 Bytes EEPROM DATA BRIEF 1.5 K Byte of SYSTEM ROM • 384 Bytes of RAM ■ 1344 Bytes of EEPROM, SECTOR COMBINATIVE 4 ■ Figure 1. Delivery Form 4 16 K Bytes of USER ROM, SECTOR COMBINATIVE 4 8 BIT ARCHITECTURE CPU ■ 4 ■

bull cp8

Abstract: SO20 ST19 ST19AF08
Contextual Info: ST19AF08 CMOS MCU Based Safeguarded SMARTCARD With 8 KBytes EEPROM DATA BRIEF PRODUCT FEATURES • ENHANCED 8 BIT CPU WITH EXTENDED ADDRESSING MODES ■ 32 KBYTES OF USER ROM WITH PARTITIONING ■ SYSTEM ROM FOR LIBRARIES ■ 960 BYTES OF USER RAM WITH PARTITIONING

innovatron

Contextual Info: ST16RF42 CMOS BASED SMARTCARD IC WITH 2048 Bytes EEPROM FOR CONTACTLESS/CONTACT APPLICATIONS TARGET SPECIFICATIO N • ■ ■ ■ ■ – – – – – ■ ■ ■ ■ – – 8 BIT ARCHITECTURE CPU 16 KBytes of USER ROM, SECTOR COMBINATIVE 1.5 KBytes of SYSTEM ROM

Contextual Info: TO SH IBA UNDER DEVELOPMENT TMP95CW86/TMP95FW86 CMOS 16-Bit Microcontroller TMP95CW86F / TMP95FW86F TMP95CW86DF / TMP95FW86DF 1. Outline and Features The TMP95CW86 and TMP95FW86 are high-speed, high-performance 16-bit microcontrollers developed for medium- to large-scale control applications.

bull cp8

Abstract: SMARTCARD IC datasheet ST16 ST16RF52
Contextual Info: ST16RF52 CONTACTLESS ISO 14443-B Smartcard IC WITH 2048 Bytes EEPROM DATA BRIEF • 8-BIT ARCHITECTURE CPU ■ 22 KBytes of USER ROM, SECTOR COMBINATIVE ■ SYSTEM ROM ■ 512 Bytes of RAM ■ 2048 Bytes of EEPROM, SECTOR COMBINATIVE – Highly reliable CMOS EEPROM technology

ST16SF44

Abstract: ST16 ST16-19HDSE bull cp8
Contextual Info: ST16SF44 Smartcard MCU With 4096 Bytes EEPROM DATA BRIEF 1.5 K Byte of SYSTEM ROM • 384 Bytes of RAM ■ 4096 Bytes of EEPROM, SECTOR COMBINATIVE 4 ■ Figure 1. Delivery Form 4 16 K Bytes of USER ROM, SECTOR COMBINATIVE 4 8 BIT ARCHITECTURE CPU ■ 4 ■

Contextual Info: ST19SF08 CMOS MCU Based Safeguarded SMARTCARD With 8 KBytes EEPROM DATA BRIEF 4 4 4 s ct Figure 1. Delivery Form 4 PRODUCT FEATURES • ENHANCED 8 BIT CPU WITH EXTENDED ADDRESSING MODES ■ 32 KBYTES OF USER ROM WITH PARTITIONING ■ SYSTEM ROM FOR LIBRARIES

ST16

Abstract: ST16-19HDSE ST16SF4F
Contextual Info: ST16SF4F Smartcard MCU With 16352 Bytes EEPROM DATA BRIEF 1.5 K Byte of SYSTEM ROM • 384 Bytes of RAM ■ 16352 Bytes of EEPROM, SECTOR COMBINATIVE 4 ■ Figure 1. Delivery Form 4 16 K Bytes of USER ROM, SECTOR COMBINATIVE 4 8 BIT ARCHITECTURE CPU ■ 4