BV48B Search Results

Contextual Info: CY7C1069DV33 16-Mbit 2 M x 8 Static RAM 16-Mbit (2 M × 8) Static RAM Functional Description Features • High speed ❐ tAA = 10 ns The CY7C1069DV33 is a high performance CMOS Static RAM organized as 2,097,152 words by 8 bits. ■ Low active power ❐ ICC = 175 mA at 100 MHz

CY62167DV18L-55

Abstract: CY62167DV18LL-55 CY62167DV18
Contextual Info: CY62167DV18 MoBL2 PRELIMINARY 16M 1024K x 16 Static RAM Features • Very high speed: 55 ns and 70 ns • Voltage range: 1.65V to 1.95V • Ultra-low active power — Typical active current: 1.5 mA @ f = 1 MHz — Typical active current: 15 mA @ f = fMAX

CY62167DV30L-55ZI

Abstract: CY62167DV30
Contextual Info: CY62167DV30 MoBL 16-Mbit 1M x 16 Static RAM Features reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed

Contextual Info: CY62167DV18 MoBL2 PRELIMINARY 16M 1024K x 16 Static RAM Features • Very high speed: 55 ns and 70 ns • Voltage range: 1.65V to 1.95V • Ultra-low active power — Typical active current: 1.5 mA @ f = 1 MHz — Typical active current: 15 mA @ f = fMAX

Contextual Info: CY62168DV30 MoBL 16-Mbit 2048K x 8 Static RAM Features power consumption by more than 99% when deselected Chip Enable 1 (CE 1) HIGH or Chip Enable 2 (CE2) LOW . The input/output pins (I/O0 through I/O7) are placed in a high-impedance state when: deselected Chip Enable 1 (CE1)

Contextual Info: CY7C1069DV33 16-Mbit 2 M x 8 Static RAM 16-Mbit (2 M × 8) Static RAM Features Functional Description • High speed ❐ tAA = 10 ns The CY7C1069DV33 is a high performance CMOS Static RAM organized as 2,097,152 words by 8 bits. ■ Low active power ❐ ICC = 175 mA at 100 MHz

Contextual Info: CY62167DV30 MoBL 16-Mbit 1 M x 16 Static RAM Features • Thin small outline package (TSOP-I) configurable as 1 M × 16 or as 2 M × 8 SRAM ■ Wide voltage range: 2.2 V – 3.6 V ■ Ultra-low active power: Typical active current: 2 mA at f = 1 MHz ■

Contextual Info: CY7C1061DV33 16-Mbit 1 M x 16 Static RAM 16-Mbit (1 M × 16) Static RAM Features Functional Description • High speed ❐ tAA = 10 ns The CY7C1061DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits. ■ Low active power ❐ ICC = 175 mA at 100 MHz

Contextual Info: MoBL CY62168DV30 PRELIMINARY 16M 2048K x 8 Static RAM Features power consumption by more than 99% when deselected Chip Enable 1 (CE1) HIGH or Chip Enable 2 (CE2) LOW . The input/output pins (I/O0 through I/O7) are placed in a high-impedance state when: deselected Chip Enable 1 (CE1)

CY62167DV20

Abstract: CY62167DV20L CY62167DV20LL
Contextual Info: CY62167DV20 MoBL2 16-Mb 1024K x 16 Static RAM Features toggling. The device can be put into standby mode reducing power consumption by more than 99% when deselected Chip Enable 1 (CE1) HIGH or Chip Enable 2 (CE2) LOW or both BHE and BLE are HIGH. The input/output pins (I/O0 through

CY62167DV30L-55ZI

Abstract: CY62167DV30
Contextual Info: CY62167DV30 MoBL 16-Mb 1M x 16 Static RAM Features reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed

Contextual Info: CY62167DV30 MoBL PRELIMINARY 16M 1024K x 16 Static RAM Features • Very high speed: 55 ns and 70 ns • Wide voltage range: 2.2V to 3.6V • Ultra-low active power — Typical active current: 2 mA @ f = 1 MHz — Typical active current: 15 mA @ f = fMAX

CY7C1061DV33-10BV1XI

Abstract: cy7c1061dv33 10bv BV1X BVJ 47
Contextual Info: CY7C1061DV33 16-Mbit 1 M x 16 Static RAM 16-Mbit (1 M × 16) Static RAM Features Functional Description • High speed ❐ tAA = 10 ns The CY7C1061DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits. ■ Low active power ❐ ICC = 175 mA at 100 MHz

BVJ 47

Abstract: CY7C1061DV33-10BV1XI CY7C1061
Contextual Info: CY7C1061DV33 16-Mbit 1 M x 16 Static RAM 16-Mbit (1 M × 16) Static RAM Features Functional Description • High speed ❐ tAA = 10 ns The CY7C1061DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits. ■ Low active power ❐ ICC = 175 mA at 100 MHz

Contextual Info: CY62167DV30 MoBL PRELIMINARY 16M 1024K x 16 Static RAM Features • Very high speed: 55 ns and 70 ns • Wide voltage range: 2.2V to 3.6V • Ultra-low active power — Typical active current: 2 mA @ f = 1 MHz — Typical active current: 15 mA @ f = fMAX

Contextual Info: CY62168DV30 MoBL 16-Mbit 2 M x 8 Static RAM 16-Mbit (2 M × 8) Static RAM Features • Very high speed ❐ 55 ns ■ Wide voltage range ❐ 2.2 V–3.6 V ■ Ultra-low active power ❐ Typical active current: 2 mA at f = 1 MHz ❐ Typical active current: 15 mA at f = fMax (55 ns Speed)

Contextual Info: CY62167DV30 MoBL 16-Mbit 1 M x 16 Static RAM 16-Mbit (1 M × 16) Static RAM Features automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE1

CY62167DV30

Abstract: CY62167DV30LL
Contextual Info: CY62167DV30 MoBL 16-Mbit 1 M x 16 Static RAM Features • Thin small outline package (TSOP-I) configurable as 1 M × 16 or as 2 M × 8 SRAM ■ Wide voltage range: 2.2 V – 3.6 V ■ Ultra-low active power: Typical active current: 2 mA at f = 1 MHz ■

CY62167DV30

Abstract: CY62167DV30LL
Contextual Info: CY62167DV30 MoBL 16 MB 1M x 16 Static RAM Features reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed

MAX518

Contextual Info: PRELIMINARY CY62167DV20 16M 1024K x 16 Static RAM Features • Very high speed: 55 ns and 70 ns • Wide voltage range: 1.65V to 2.2V • Ultra-low active power — Typical active current: 1.5 mA @ f = 1 MHz — Typical active current: 18 mA @ f = fMAX • Ultra-low standby power

Contextual Info: MoBL CY62168DV30 PRELIMINARY 16M 2048K x 8 Static RAM Features power consumption by more than 99% when deselected Chip Enable 1 (CE1) HIGH or Chip Enable 2 (CE2) LOW . The input/output pins (I/O0 through I/O7) are placed in a high-impedance state when: deselected Chip Enable 1 (CE1)

CY62167DV30

Abstract: CY62167DV30LL
Contextual Info: CY62167DV30 MoBL 16-Mbit 1M x 16 Static RAM Features • Thin small outline package (TSOP I) Configurable as 1M x 16 or as 2M x 8 SRAM ■ Wide voltage range: 2.2 V – 3.6 V ■ Ultra-low active power: Typical active current: 2 mA at f = 1 MHz ■ Ultra-low standby power

Contextual Info: CY62167DV30 MoBL 16-Mbit 1 M x 16 Static RAM 16-Mbit (1 M × 16) Static RAM Features automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE1

CY62167DV20

Abstract: CY62167DV20L CY62167DV20LL 13149
Contextual Info: CY62167DV20 MoBL2 16-Mb 1024K x 16 Static RAM Features toggling. The device can be put into standby mode reducing power consumption by more than 99% when deselected Chip Enable 1 (CE1) HIGH or Chip Enable 2 (CE2) LOW or both BHE and BLE are HIGH. The input/output pins (I/O0 through