C0058 Search Results

AD9218

Abstract: AD9288 AD9288BST-100 AD9288BST-40 AD9288BST-80 sn74lcx86 d6bvd
Contextual Info: a APPLICATIONS Battery-Powered Instruments Hand-Held Scopemeters Low Cost Digital Oscilloscopes I and Q Communications FUNCTIONAL BLOCK DIAGRAM ENCA AD9288 TIMING AINA T/H AINA ADC REFINA REFOUT AINB T/H AINB ENCB The AD9288 is a dual 8-bit monolithic sampling analog-todigital converter with on-chip track-and-hold circuits and is

C3199

Abstract: transistor c3199 ifr 2040 service C3199 transistor aeroflex 2040 3225 black star rohde oscilloscope c3192 rohde UPA audio analyzer rohde Schwarz UPA3
Contextual Info: AM/FM SIGNAL GENERATORS 2040 Series Operating Manual Document part no. 46892/074 Issue 27 23 April 2007 Operating Manual SIGNAL GENERATORS 2040 series 2040 10 kHz to 1.35 GHz 2041 10 kHz to 2.7 GHz 2042 10 kHz to 5.4 GHz Includes information on: Option 001 - Second modulation oscillator

Contextual Info: Triple 8-Bit, 140 MSPS A/D Converter AD9483 a FEATURES 140 MSPS Guaranteed Conversion Rate 100 MSPS Low Cost Version Available 330 MHz Analog Bandwidth 1 V p-p Analog Input Range Internal 2.5 V Reference Differential or Single-Ended Clock Input 3.3 V/5.0 V Three-State CMOS Outputs

sine wave SCHEMATIC

Contextual Info: a FEATURES On-Chip Reference and Track/Hold On-Chip Input Buffer 850 mW Typical Power Dissipation at 105 MSPS 500 MHz Analog Bandwidth SNR = 67 dB @ 49 MHz AIN at 105 MSPS SFDR = 80 dB @ 49 MHz AIN at 105 MSPS 2.0 V p-p Differential Analog Input Range Single 5.0 V Supply Operation

C00585

Abstract: E9-E10 NC6 5/16 AD9218 AD9288 AD9288BST-100 AD9288BST-40 AD9288BST-80
Contextual Info: a APPLICATIONS Battery-Powered Instruments Hand-Held Scopemeters Low Cost Digital Oscilloscopes I and Q Communications FUNCTIONAL BLOCK DIAGRAM ENCA AD9288 TIMING AINA T/H AINA ADC REFINA REFOUT AINB T/H AINB ENCB The AD9288 is a dual 8-bit monolithic sampling analog-todigital converter with on-chip track-and-hold circuits and is

SN74VCX86

Abstract: AD9288 ad9288-100 AD9218 AD9288BST-100 AD9288BST-40 AD9288BST-80 D3Q DAC TSW-140-08-L-D-RA
Contextual Info: 8-Bit, 40/80/100 MSPS Dual A/D Converter AD9288 FUNCTIONAL BLOCK DIAGRAM FEATURES AINA T/H AINA Battery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes I and Q communications ADC 8 REFINA REFOUT AINB ENCB 8 T/H ADC SELECT 2 8 TIMING

74116

Contextual Info: Signetics 74116 Latch Dual 4-Bit Transparent Latch Product Specification Logic Products DESCRIPTION TYPE TYPICAL PROPAGATION DELAY— DATA TO OUTPUT TYPICAL SUPPLY CURRENT TOTAL 11ns 50mA 74116 ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; T a = 0°C to + 7 0 ”C

Contextual Info: 74LS375 Signetics Latch Quad Bistable Latch Product Specification Logic Products FEATURES TYPE • Quad transparent latch • Complementary outputs T Y P IC A L PR O P A G A TIO N D E LA Y T Y P IC A L SU PP LY C U R R E N T TO T A L 1 2 ns 6.3m A 74LS375

ad780n

Abstract: AD8138 AD9432 AD9432BST-105 AD9432BST-80 MC10EL16 ST-52 C00587-0-10 EL16 transformer
Contextual Info: a FEATURES On-Chip Reference and Track/Hold On-Chip Input Buffer 850 mW Typical Power Dissipation at 105 MSPS 500 MHz Analog Bandwidth SNR = 67 dB @ 49 MHz AIN at 105 MSPS SFDR = 80 dB @ 49 MHz AIN at 105 MSPS 2.0 V p-p Differential Analog Input Range Single 5.0 V Supply Operation

veam cir 290

Contextual Info: Cover headline VEAM Cover headline CIR Series ITT Interconnect Solutions Cannon, VEAM, BIW Connector Systems Visit our website at www.ittcannon.com Global Design & Manufacturing Customer Support North America Europe & Middle East Asia MEXICO - Cannon, VEAM

74HC245 application

Abstract: ad780r 100k trimpot pin configuration 1K variable resistor pin configuration transistor 2N2222 AD9260-EB PIN CONFIGURATION 2N2222 AD9260 ttl buffer 74hc245 star delta ladder diagram
Contextual Info: High Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate AD9260 STAGE 1:2X 16-BIT: DECIMATION 10MHz FILTER REFERENCE BUFFER DRVDD DRVSS DIGITAL DEMODULATOR 12-BIT: 20MHz AD9260 STAGE 2:2X 16-BIT: DECIMATION 5MHz FILTER OTR 16-BIT: STAGE 3:2X

lenze d-31855 manual

Abstract: lenze 530 speed controller lenze inverter manual book 1.5 kw LENZE 510 dc driver LENZE 8200 parameter list LENZE 9300 drive manual LENZE fault diagnostics CINH int 1 EMZ9371Bb transistor c2458 LENZE fault diagnostics
Contextual Info: Ä.ù}<ä EDBCSXS064 .ù}< Operating Instructions ECS ECSESxxx / ECSDSxxx / ECSCSxxx Axis module ˘ "Speed and Torque" application l , Please read these instructions before you start working! Follow the enclosed safety instructions. These Instructions are valid for ECSxS. axis modules as of version:

AD9432

Abstract: SQ-52 ST-52 ADT1-1WT
Contextual Info: a FEATURES On-Chip Reference and Track/Hold On-Chip Input Buffer 850 mW Typical Power Dissipation at 105 MSPS 500 MHz Analog Bandwidth SNR = 67 dB @ 49 MHz AIN at 105 MSPS SFDR = 80 dB @ 49 MHz AIN at 105 MSPS 2.0 V p-p Differential Analog Input Range Single 5.0 V Supply Operation

Contextual Info: High Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate AD9260 STAGE 1:2X 16-BIT: DECIMATION 10MHz FILTER REFERENCE BUFFER DRVDD DRVSS DIGITAL DEMODULATOR 12-BIT: 20MHz AD9260 STAGE 2:2X 16-BIT: DECIMATION 5MHz FILTER OTR 16-BIT: STAGE 3:2X

AD9760

Abstract: transformer e19 AD9283 AD9283BRS-100 AD9283BRS-50 AD9283BRS-80 RS-20 E19 CORE TRANSFORMER
Contextual Info: a 8-Bit, 50 MSPS/80 MSPS/100 MSPS 3 V A/D Converter AD9283 FEATURES 8-Bit, 50, 80, and 100 MSPS ADC Low Power: 90 mW at 100 MSPS On-Chip Reference and Track/Hold 475 MHz Analog Bandwidth SNR = 46.5 dB @ 41 MHz at 100 MSPS 1 V p-p Analog Input Range Single 3.0 V Supply Operation 2.7 V–3.6 V

AD9432

Abstract: MC10EL16 SQ-52 ST-52
Contextual Info: a FEATURES On-Chip Reference and Track/Hold On-Chip Input Buffer 850 mW Typical Power Dissipation at 105 MSPS 500 MHz Analog Bandwidth SNR = 67 dB @ 49 MHz AIN at 105 MSPS SFDR = 80 dB @ 49 MHz AIN at 105 MSPS 2.0 V p-p Differential Analog Input Range Single 5.0 V Supply Operation

DALE R 01F

Abstract: oms 450 OMS 1410 ad8055 AD9483 AD9483KS-100 AD9483KS-140 R101 so20w BA524
Contextual Info: a FEATURES 140 MSPS Guaranteed Conversion Rate 100 MSPS Low Cost Version Available 330 MHz Analog Bandwidth 1 V p-p Analog Input Range Internal 2.5 V Reference Differential or Single-Ended Clock Input 3.3 V/5.0 V Three-State CMOS Outputs Single or Demultiplexed Output Ports

CRCW1206000ZT

Abstract: oms 450 AD8055 AD9483 AD9483KS-100 AD9483KS-140 R101 BB514
Contextual Info: a FEATURES 140 MSPS Guaranteed Conversion Rate 100 MSPS Low Cost Version Available 330 MHz Analog Bandwidth 1 V p-p Analog Input Range Internal 2.5 V Reference Differential or Single-Ended Clock Input 3.3 V/5.0 V Three-State CMOS Outputs Single or Demultiplexed Output Ports

AD9760

Contextual Info: a 8-Bit, 50 MSPS/80 MSPS/100 MSPS 3 V A/D Converter AD9283 FEATURES 8-Bit, 50, 80, and 100 MSPS ADC Low Power: 90 mW at 100 MSPS On-Chip Reference and Track/Hold 475 MHz Analog Bandwidth SNR = 46.5 dB @ 41 MHz at 100 MSPS 1 V p-p Analog Input Range Single 3.0 V Supply Operation 2.7 V–3.6 V

fcs 9014

Abstract: mtc-20156 ixp400 embedded processor ATM transaction- ABSTRACT "filtering database" ixp4xx MTC-20154 ixp420 network processor family microcode program IXP420 ixp425
Contextual Info: Intel IXP400 Software Programmer’s Guide June 2004 Document Number: 252539-005a Intel® IXP400 Software Contents INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN

Contextual Info: EUROPEAN STANDARD D-SUB. FEMALE CONNECTOR RIGHT ANGLE TYPE 9.4MM SPECIFICATIONS Current Rating: 3.0 Amperes Contact Resistance: 25mΩ Max. Insulation Resistance: 1000MΩ Min. at 500V Dielectric Voltage: 1000V at 1 Minute Operating Temperature: -55ºc to +105ºc

74LS113

Contextual Info: 74LS113, S113 Flip-Flops S ig n e tics Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION TYPE T h e '1 1 3 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, S e t and Clock inputs. T h e asynchro­ nous S et Sp input, when LO W , forces