CI 4953 Search Results

Contextual Info: For More Information Visit 3M Electric Utility Splicing Web Pages / Glossary of Splicing Terms.316 Cable Types for Splicing. 317-319

Contextual Info: HD64180S -NPU Network Processing Unit • DESCRIPTION The HD64180S, network processing unit (N PU ), provides multipurpose high-speed com m unication control functions on a single LSI chip. The HD64180S offers high perform ance com m unication protocol process­

mcr 72 hpm 06

Contextual Info: H D 64180S - N P U Network Processing Unit • D E S C R IP TIO N The HD64180S, network processing unit (NPU), provides multipurpose high-speed communication control functions on a single LSI chip. The HD64180S offers high performance communication protocol process­

CY7C1358A

Abstract: GVT7164T18
Contextual Info: 327 CY7C1358A/ GVT7164T18 64K x 18 Synchronous Cache Tag RAM Pipelined Output Features • • • • • • • • • • • • • • Functional Description Fast match times: 4.5, 5.0, 6.0, and 7.0 ns Fast clock speed: 133, 100, 83, and 75 MHz Fast OE access times: 4.5 ns and 5.0 ns

Contextual Info: SIEMENS Nonvolatile Memory 8-Kbit E2PROM with I2C Bus and Write Protection SDA 3586-5 MOS 1C Features • Word-organized programmable nonvolatile memory in n-channel floating-gate technology E2PROM • 1024 x 8-bit organization • Supply voltage 5 V • Serial 2-line bus for data input and output (l2C Bus)

a7 moe

Abstract: CY7C1358A GVT7164T18 0/a7 moe
Contextual Info: 327 CY7C1358A/ GVT7164T18 64K x 18 Synchronous Cache Tag RAM Pipelined Output Features • • • • • • • • • • • • • • Functional Description Fast match times: 4.5, 5.0, 6.0, and 7.0 ns Fast clock speed: 133, 100, 83, and 75 MHz Fast OE access times: 4.5 ns and 5.0 ns

marking 3U 3T 3C diode 3E 3G

Abstract: marking 3U 3T 3C diode marking 3U 3T diode GALVANTECH marking 2U 58 diode GVT7164T18
Contextual Info: ADVANCE INFORMATION GALVANTECH, INC. SYNCHRONOUS CACHE TAG SRAM PIPELINED OUTPUT GVT7164T18 64K X 18 SYNCHRONOUS TAG SRAM 64K x 18 SRAM +3.3V SUPPLY WITH CLOCKED REGISTERED INPUTS FEATURES GENERAL DESCRIPTION • • • • • • • • • • • •

GVT7164B18

Contextual Info: GALVANTECH, INC. GVT7164B18 64K X 18 SYNCHRONOUS BURST SRAM SYNCHRONOUS BURST SRAM 64K x 18 SRAM +3.3V SUPPLY WITH CLOCKED, REGISTERED INPUTS, BURST COUNTER FEATURES GENERAL DESCRIPTION • • • • • • • • • • The Galvantech Synchronous Burst SRAM family

marking A00

Abstract: GVT7164D18
Contextual Info: GALVANTECH, INC. GVT7164D18 64K X 18 SYNCHRONOUS BURST SRAM SYNCHRONOUS BURST SRAM PIPELINED OUTPUT 64K x 18 SRAM +3.3V SUPPLY,FULLY REGISTERED INPUTS AND OUTPUTS, BURST COUNTER FEATURES GENERAL DESCRIPTION • • • • • The Galvantech Synchronous Burst SRAM family

GALVANTECH

Abstract: GVT7164C18
Contextual Info: GALVANTECH, INC. GVT7164C18 64K X 18 SYNCHRONOUS BURST SRAM SYNCHRONOUS BURST SRAM PIPELINED OUTPUT 64K x 18 SRAM +3.3V SUPPLY,FULLY REGISTERED INPUTS AND OUTPUTS, BURST COUNTER FEATURES GENERAL DESCRIPTION • • • • • The Galvantech Synchronous Burst SRAM family

49539

Abstract: NM93C86AN
Contextual Info: & September 1995 NM93C86/C86A 16,384-Bit Serial Interface, Standard Voltage CMOS EEPROM MICROWIRE Synchronous Bus General Description Features' The NM93C06A is 16,384 bits of CMOS nonvolatile, electri­ cally erasable memory available in either 1024 16-bit regis­

of architecture of ADSP21xxx SHARC processor

Abstract: adsp21xxx ADSP-21xxx Architecture of adsp21xxx sharc processor syntax for writing the assembly codes in ADSP-210XX tools 2126x tag 8944 ADSP21000 ADSP21020 ADSP21060
Contextual Info: W4.0 C/C+ Compiler and Library Manual for SHARC Processors Revision 5.0, January 2005 Part Number 82-001963-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document

Contextual Info: D C RDC-19220 SERIES 2 0 1993 ILC DATA DEVICE CORPORATION _ 16 BIT MONOLITHIC TRACKING RESOLVER and LVDT TO DIGITAL CONVERTERS FEATURES • +5V-ONLY OPTION DESCRIPTION • ONLY5 EXTERNAL PASSIVE The RDC-19220 Series are low cost ver­ satile 16 bit monolithic state-of-the-art

HL 4929 LF

Contextual Info: TOSHIBA UNDER DEVELOPMENT TMP88CK49/M49 CMOS 8-BIT MICROCONTROLLER TMP88CK49N, TMP88CM49N TMP88CK49F, TMP88CM49F TMP88CK49N, TMP88CM49N, TMP88CK49F, and TMP88CM49F, are high-speed, high-function 8-bit single­ chip microcomputers whose built-in features include large-capacity RAM, multi-function timer/counter, and

of architecture of ADSP21xxx SHARC processor

Abstract: BIT 3251 pwm adsp21xxx STi 5197 register configuration mar 552 mrf 5643 cfft64 STi 5197 2126X ADSP21000
Contextual Info: W4.5 C/C+ Compiler and Library Manual for SHARC Processors Revision 6.0, April 2006 Part Number 82-001963-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document

TCD1250D

Abstract: tcd1250 CCD linear array LM4041 LM9800 LM9800CCV LM9800CCVF V52A RGB signal converting to vga
Contextual Info: August 1995 S e mi c o n d u c t o r LM 9800 8-B it G re y s c a le /2 4 -B it C o lor Linear CCD S ensor P rocessor General Description Features The LM9800 is a high performance integrated signal proc­ essor/digitizer for linear CCD image scanners. The LM9800

82C811

Abstract: 82C812 neatsx 82C631 chipset 82c206 386sx chipset 82c211 HA12013 ADTL 84 LIM EMS 4.0
Contextual Info: •■ ■« \ . n « ai it a ■■ H H Preliminary i r 3 TM CS 8281 NEATsx U 12/89 A T A M I M D D A v STK#1 0 0 3 3 -0 0 2 R ev 2 . 0 A I / u r v CS8281 Data Book \ - n Preliminary i r s COPYRIGHT NOTICE Copyright o 1989, Chips and Technologies, Inc. ALL RiGHTS RESERVED,

tricore pcp instruction set

Abstract: tricore instruction set "64-Bit Microcontroller" siemens cpu 416
Contextual Info: s TriCore Architecture Overview Handbook Elaine Hadad Version 1.1 09/17/97 ♦ P RELIM INARY EDIT IO N ♦ Copyright 1997 Siemens AG. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for

ha 13627

Abstract: APC UPS CIRCUIT DIAGRAM APC UPS WIRING DIAGRAM APC UPS CIRCUIT layout CIRCUIT DIAGRAM APC UPS 700 f5j transistor stt 433 AM Transmitter block diagram P8XC592 APC UPS 650 CIRCUIT DIAGRAM P87C592
Contextual Info: INTEGRATED CIRCUITS i A S l n l H I T P8XC592 8-bit microcontroller with on-chip CAN Product specification Supersedes data of August 1992 File under Integrated Circuits, IC20 January 1995 Philips Semiconductors PHILIPS 7110 62 b DOfibbTb bflH Philips Semiconductors

siemens S 7- 400 MANUAL

Abstract: "64-Bit Microcontroller" tricore pcp instruction set tricore PCXI tricore instruction set "vector instructions" saturation TriCore Architecture Manual
Contextual Info: s TriCore Architecture Overview Handbook Elaine Hadad Version 1.1 09/17/97 ♦ P RELIM INARY EDIT IO N ♦ Copyright 1997 Siemens AG. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for

SAB-C1610-L16M

Abstract: SAB-C1610L16M SAB-C1610 sab c1610 l16m Siemens C16x Family Instruction Set Manual T30U siemens cpu 416 siemens cpu 216 MQFP 80 PACKAGE
Contextual Info: SIEMENS C166-Family of High-Performance CMOS 16-Bit Microcontrollers Preliminary C161V, C161K, C1610 • • • • • • • • • • • • • • • • • • • • • • • • • • • C161 16-Bit Microcontrollers High Performance 16-bit CPU with 4-Stage Pipeline

bd 49131

Abstract: Bd 49131 IC pin diagram transistor k49 49110 NR sem 2106 inverter diagram k49 transistor sem 2106 inverter block diagram P2A Hall Sensor M497 LW 4933
Contextual Info: TOSHIBA TM P88C K49/M49 CMOS 8-Bit Microcontroller TMP88CK49N, TMP88CM49N TMP88CK49F, TMP88CM49F TMP88CK49N, TMP88CM49N, TMP88CK49F, and TMP88CM49F, are high-speed and high-function 8-bit single­ chip microcomputers whose built-in features include large-capacity RAM, multi-function timer/counter, and

SIEMENS 3 TB 40 12 - 0A

Abstract: smd transistor 2T5 SIEMENS 3 TB 40 10 - 0A SIEMENS 3 TB 40 17 - 0A
Contextual Info: SIEMENS ISDN Subscriber Access Controller for UpN-lnterface Terminals ISAC -P TE PSB 2196 Preliminary Data 1 • • • • • • • • • • CMOS IC Features Cost/performance-optimized UPN-interface transceiver, compatible to PEB 2096 OCTAT-P HDLC-controller with 2 x 32 byte FIFO per direction

BFT65

Abstract: D1279 Siemens 1414 D1275 germanium Germanium drift transistor diode a811 Siemens Halbleiter germanium transistor legiert
Contextual Info: Table of Contents Selection Guide Ordering Codes Inhaltsverzeichnis Typeniibersicht Bestellnummern Scope of Applications Technical Information Quality Specifications Einsatzhinweise Technische Angaben Qualitatsangaben Package Outlines Mounting Instructions