CI 7402 Search Results

6072B

Abstract: AT91FR40161 6040B AT91FR40161-CI
Contextual Info: Errata This Errata Sheet refers to: • The following datasheets: – • AT91FR40161 Datasheet, Rev. 6040B - 24-Mar-04 120-lead BGA devices with the following references in the marking: AT91FR40161-CI 56520A 1. Full Chip Erase Command May Not Fully Erase Flash

3R18

Abstract: AT91FR40162 AT91FR40162-CI atmel lot marking
Contextual Info: Errata This Errata Sheet refers to: • The following datasheets: – • AT91FR40162 Datasheet, Rev. 2632C - 24-Mar-04 121-lead BGA devices with the following references in the marking: AT91FR40162-CI 58A03X 1. Full Chip Erase Command May Not Fully Erase Flash

AT91FR40162

Abstract: AT91FR40162-CI 121-lead
Contextual Info: Errata This Errata Sheet refers to: • The following datasheets: – • AT91FR40162 Datasheet, Rev. 2632C - 24-Mar-04 121-lead BGA devices with the following references in the marking: AT91FR40162-CI 58A03X 1. Full Chip Erase Command May Not Fully Erase Flash

PC603R

Abstract: atmel 528 24 c01 TSPC603R 255l K12K14 NS615
Contextual Info: Features • • • • • • • Superscalar 3 Instructions per Clock Peak Dual 16 KB Caches Selectable Bus Clock 32-bit Compatibility PowerPC Implementation On-chip Debug Support Nap, Doze and Sleep Power Saving Modes Device Offered in Cerquad, CBGA 255 and CI-CGA 255

Atmel MARKING CODE

Abstract: atmel lot marking Atmel "MARKING CODE" atmel bottom "marking" AT91FR4042-CI CI 576 East marking atmel "marking"
Contextual Info: Errata Sheet This Errata Sheet refers to: • The AT91FR4042 products. • The AT91FR4042 Datasheet, reference 2648C and all the documents mentioned in Table 1, page 8 of this datasheet. The Device Marking is made up of: • The commercial name, AT91FR4042-CI, on the top, just below the ATMEL logo.

TEA 2025 equivalent

Abstract: atmel 528 24 c01 abb main switch ABB 14 11 09 Tag 225 600 replacement TMS 320 C 6X processor datasheet JESD51-2 TSPC603R atmel part marking c08
Contextual Info: Features • • • • • • • Superscalar 3 Instructions per Clock Peak Dual 16 KB Caches Selectable Bus Clock 32-bit Compatibility PowerPC Implementation On-chip Debug Support Nap, Doze and Sleep Power Saving Modes Device Offered in Cerquad, CBGA 255, HiTCE CBGA 255 and CI-CGA 255

Contextual Info: 28-pin Side Braze 300 mils Side Braze Package Drawings Code: CP Date: 11/12/97 Rev. C–AERO–06/02 1 28-pin Side Braze (600 mils) Code: CI Date: 19/06/00 2 Rev. C–AERO–06/02 32-pin Side Braze (400 mils) Code: C9 Date: 10/07/97 3 Rev. C–AERO–06/02

str f 6456

Abstract: str x 6456 SM 5126 BP STR F 6168 str 6668 STR G 6352 STR 6456 str f 6468 321 CJ 7121 AXP 209 IC
Contextual Info: Tem ic Se ni i co n fi li c t ci Sales Offices rs Addresses Europe France TE M IC France Les Q uadrants 3. avenue du centre B.P. 309 78054 S t.-Q uentin-en-Y veL nes Cedex Tel: 33 I 3060 7000 F a x :33 I 3060 V 11 i Germany TE M IC TE LEFU N K EN m icroelectronic G m bH

74028N

Abstract: 64028N 74028 tny 175 pn
Contextual Info: M C Y 74028N M C V 64028N Ukìad dekodera kodu BCO na kod 1 z 10.W przypadku wykorzystanla tylko trzech wejíSó byé w ykoreystany moie koril 1 z 8. od Dekoder kodu B C D na kod dziesiçtny A do c /I = "O"/, jako dekoder kodu blnarnego na Informacja w stçpna

ci 74

Abstract: 74027N
Contextual Info: M C Y 74027N M C Y 64027N Dwukrotny przerzirtnik typu JK Uklad sawiera dwa n iezale¿ne przerzutniki "JK ". Pane z wejáó J i K przepisywane 84 na wyjáoia Q podczas narastajqoego zbocza sygnaïu zegarowego CP /CLOCK PULSE/. Ustawianie i zerowanie przerzutnikôw odbywa a iç przez

74029

Abstract: 74029N UM-005 64029N MS155 MCY 74
Contextual Info: M CY 74029N M C Y 64029N Synchroniczny, uniwersalny lieznik czterobitowy Uklad pelni f u n k e 4-bitowego lieznika BCD lub binarnego licz^oego w gór§ lub w dól,z mozliwo£ei$ wst^pnego ustawiania. Zmiana stanu wyjéc do dòkonuj&si$ wraz z narastaj^cytn zboezem sygnalu CP

RECEIVER BANDPASS FILTER PIN

Abstract: marconi company marconi tube company
Contextual Info: Features • • • • • • • • • • • • Supply Voltage: 8.5 V RF Frequency Range: 1400 MHz to 1550 MHz IF Frequency Range: 150 MHz to 250 MHz Enhanced IM3 Rejection Overall Gain Control Range: 30 dB Typically DSB Noise Figure: 10 dB Gain-controlled Amplifier and L-band Mixer

ATR2731

Abstract: 4903C ATR2730 ATR2730-TLQY ATR2730-TLSY BBY51 DRR030 dab circuitry
Contextual Info: Features • • • • • • • • • • • • Supply Voltage: 8.5V RF Frequency Range: 1400 MHz to 1550 MHz IF Frequency Range: 150 MHz to 250 MHz Enhanced IM3 Rejection Overall Gain Control Range: 30 dB Typically DSB Noise Figure: 10 dB Gain-controlled Amplifier and L-band Mixer

DRR030

Abstract: ATR2730 ATR2730-TCQY ATR2730-TCSY ATR2731 BBY51
Contextual Info: Features • • • • • • • • • • • • Supply Voltage: 8.5V RF Frequency Range: 1400 MHz to 1550 MHz IF Frequency Range: 150 MHz to 250 MHz Enhanced IM3 Rejection Overall Gain Control Range: 30 dB Typically DSB Noise Figure: 10 dB Gain-controlled Amplifier and L-band Mixer

Contextual Info: 10 74029 ASSEMBLY # CONTACT ELATIN G 74029-6000 SEE NOTE 2. 74029-6050 S EE NOTE 3. J otL - 3-6,0 < 0 —* [T <l.m —s- 3.3 1 'AT'i l T / [ L y RE F. 10.52 0 . T 2 5 ± 0 . 0 75 P L A T E D TH RU HOLE 0 PA D 0 .8 3 8 D R I L L NOTES: I. MATERIALS: HOUSING - LIQUID CRYSTAL POLYMER LCP

IC 7493n

Abstract: and pin diagram of IC 7491 ic 7490n 7400N pin diagram ic 7402n TTL 74-series IC LIST 7404N pin DIAGRAM OF IC 7401 7402N 7403AN
Contextual Info: INTEGRATED CIRCUITS LIST OF COMPARABLE TYPES T T L RANGE COMMERCIAL VERSIONS Type No. 7400N 7401N 7401 AN 7402N 7403N 7403AN 7404N 7405N 7405AN 741 ON 7420N 7430N 7440N 7441 AN 7442N 7450N 7451N 7453N Mullard types Type No. Mullard types FJH131 FJH231 FJH311

Contextual Info: GMM7402000CS/SG-60/70/80 LG Semicon Co., Ltd. Description 2,097,152 WORDS x 40 BIT CMOS DYNAMIC RAM MODULE Features The GM M 7402000CS/SG is a 2M x 40 bits Dynamic RAM M ODULE which is assembled 20 pieces o f 1M x 4 bit DRAM s in 20/26 pin SOJ package on both side the

4152B

Abstract: CIMax CIMAX-TM 2.0 SCM Microsystems Japan T90FJR CIT057 IDTR3041 MA25 ST20 TC81220F
Contextual Info: 1. Features • Module Interface – 2 full independent module capability – Common Interface Standard compliant • DVB_CI CENELEC EN-50221 • NRSS-B (SCTE IS-679 Part B) • DAVIC v1.2 (CA0 interface) – Memory PCMCIA compliance (R2) • 8-bit data access

Katalog CEMI

Abstract: 74047 74071 74035 74029 monostabil 64C08N MCY 4047 MCY 74 comparator 220 J75
Contextual Info: NAUKOWO-PRODUKCYJNE CENTRUM PÖtPRZEWODNIKOW ELEMENTY PÖtPRZEWODNIKOWE Katalog wyroböw CEM I 1 9 8 3 /1 9 8 4 c z i n UKtADY CMOS SERII MCY 74/64.N Warszawa 1983 r. Og6lne zasady oznaczania ukladow scalonych U C Y 7 4 0 0 M I 1. lite r a / w y k o n o n ie /

1016c

Abstract: AT88SC153-09PT-00
Contextual Info: Features • • • • • • • • • One 64 x 8 512-bit Configuration Zone Three 64 x 8 (512-bit) User Zones Programmable Chip Select Low-voltage Operation: 2.7V to 5.5V Two-wire Serial Interface 8-byte Page Write Mode Self-timed Write Cycle (10 ms max)

AT88SC153

Abstract: AT88SC153-09ET-00 AT88SC153-09GT-00 AT88SC153-09HT-00 AT88SC153-09PT-00 AT88SC153-10PI-00 AT89C2051 AT89C51 AT90S1200 AT89C51 INSTRUCTION SET
Contextual Info: Features • • • • • • • • • One 64 x 8 512-bit Configuration Zone Three 64 x 8 (512-bit) User Zones Programmable Chip Select Low-voltage Operation: 2.7V to 5.5V Two-wire Serial Interface 8-byte Page Write Mode Self-timed Write Cycle (10 ms max)

d16ac

Abstract: ATmel AT89C2051 AT88SC1608 AT88SC1608-09ET-00 AT88SC1608-09PT-00 AT88SC1608-10CI-00 AT88SC1608-10PI-00 AT88SC1608-10SI-00 AT89C2051 AT89C51
Contextual Info: Features • • • • • • • • One 128 x 8 1K bit Configuration Zone Eight 256 x 8 (16K bits) User Zones Low Voltage Operation: 2.7V to 5.5V Two-wire Serial Interface 16-byte Page Write Mode Self-timed Write Cycle (10 ms max) Answer-to-Reset Register

Contextual Info: Features • • • • • • • • One 128 x 8 1K bit Configuration Zone Eight 256 x 8 (16K bits) User Zones Low Voltage Operation: 2.7V to 5.5V Two-wire Serial Interface 16-byte Page Write Mode Self-timed Write Cycle (10 ms max) Answer-to-Reset Register

GGG72

Contextual Info: @ LG Semicon. Co. LTD. Description Features The GMM7402010ES/SG is an lM x 40 bits D y n a m ic R A M M O D U L E w h ic h is assembled 20 pieces o f 1M x 4 bit EDO DRAMs in 24 26 pin SOJ package on both side the printed circuit board with decoupling capacitors. The G M M 7402010ES/SG is