CK OCA Search Results

d 4464 c

Contextual Info: 552 EHSemiconductor National 54F/74F552 Octal Registered Transceiver with Parity and Flags General Description T h e 'F552 octa l transceiver co ntains tw o 8-bit registers fo r te m p o ra ry storage o f data flow ing in e ithe r direction. Each register has its own clo ck pulse and clo ck enable input as

w83 323

Abstract: W83L517 R5C576
Contextual Info: S c h e m a tic D ia g ra m s Appendix B:Schematic Diagrams Mainboard S h e et 1 o f 27 P A G E !-B L O C K D IAG R AM PAGE2 -C LO C K GENERATOR PAGE3 -C P U CK-TITAN CLOCK Generator PAGE7 -GM CK 133 MHz AGTL P SB LCD PANEL ATI VG A AGP 4X M o b i l i ty-P6

Contextual Info: <8 > M O TO R O LA Military 10531 Dual D Type Master Slave Flip-Flop ELECTRICALLY TESTED PER: MIL-M-38510/06101 T h e 10531 is a dual m a ste r-sla ve typ e D flip -flop. A s yn ch ro n o u s S e t S and R ese t (R) o verrid e C lo ck (C c ) and C lo ck E n a ble ( ¿ e ) inputs. E ach flip -flo p m ay

A1T TRANSISTOR

Abstract: TRANSISTOR A1t A1T -13 TRANSISTOR transistor A1t 02
Contextual Info: That HPAEW LETT WLEM CK A RD High Resolution Optical Reflective Sensor Technical Data HBCS-1100 Features • Focused Emitter and Detector in a Single Package • High Resolution-0.190 mm Spot Size • 700 nm Visible Emitter • Lens Filtered to Reject Ambient Light

Contextual Info: IBM13N2649JC IBM13N2739JC 2M x 64/72 1 B ank U nbuffered S D R A M M odule Features 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module 2Mx64/72 Synchronous DRAM DIMM Performance: 10 CAS Latency Units 3 jf c K I Clock j t CK Clock Cycle Frequency

XC100EP111

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low -V oltage 1:10 D ifferential ECL/PECL/HSTL C lock Driver T he XC100EP111 is a low sk e w 1—to —10 differential driver, desig ned w ith clo c k distribu tion in m ind. It accepts tw o clo ck so u rce s into an input

die-attach

Abstract: HMMC-5021 DDS36 C 5021 F-R
Contextual Info: m LH M H EW L E T T PA CK A R D 2 -2 6 .5 GHz GaAs MMIC Traveling Wave Am plifier Technical Data HMMC-5021 2-22 GHz HMMC-5022 (2-22 GHZ) HMMC-5026 (2-26.5 GHz) Features • Wide-Frequency Range: 2 - 26.5 GHz • High Gain: 9.5 dB • Gain Flatness: 0.75 dB

Contextual Info: ÌCM7170 HARRIS S E M I C O N D U C T O R |iP-Compatible, Real-Time Clock A pril 1997 Features Description • 8-Bit, |^P Bus Com patible T he IC M 7170 real tim e clo ck is a m icro p ro ce sso r bus com p atib le peripheral, fab ricated using H a rris’ silicon gate

Contextual Info: L 1. RECOMMENDED PANE L T H ] CK N ES S 2 . 2 9 MAX. 2. MARKING FOR UL LOGO AND CSA LOGO L OCAT ED ON ANY E X T E RI OR S U R F A C E . /3\ RECOMMENDED PANEL CUT REV a REDWKI PER EC 0G1B-' AMP LOGO AND C I R C U I T NUMBERS LOCATED N ARE A, E IT H E R S I D E . S I Z E O P T ] O NA L , FROST BACKGROUND.

C 2109 RM TO-3

Abstract: C6p ad L2109 AD 10 ld C6P
Contextual Info: ANALOG DEVICES LcwGöst ŒPMcrocorrputers F U N CTIO NA L BLO CK DIAGRAM SUMMARY 16-B it F ixed-P oint DSP M icro p ro cesso rs w ith O n-C hip M e m o ry Enhanced H arvard A rc h ite c tu re fo r T h ree-B u s P erform ance: In s tru ctio n Bus & Dual D ata Buses

Contextual Info: SC11330 4-Wire Loopback Circuit '»r SIERRA SEMICONDUCTOR □ □ □ □ B ell 4 3 0 0 3 /4 3 0 0 4 co m p a tib le P recise 2713 H z d e tecto r w ith fail-sa fe tim er M a n u a llo o p b a ck a ctiv a tio n a n d release O n -c h ip an ti-a lia sin g filter

3CRS12

Contextual Info: ^ É W f T Y P R F S S PmLUmAm CY7C9700 Fast Ethernet Repeater Controller Features • R e p e ate r lo o p b a ck m o d e fo r testin g • 13 Port IE E E 80 2.3u co m p lia n t 1 0 0B A S E -T R epeater C o n tro ller • 13 G en eral p u rp o se p ro g ram m ab le I/O pins

xc 7270

Abstract: 4706B 16X4 4000B 4706BX 12-PROGRAM
Contextual Info: 4706B/4706BX PROGRAM STACK FAIRCH ILD CMOS MACROLOGICT D E S C R IP T IO N —Th e 4 7 0 6 B /4 7 0 6 B X is a 1 6 -w o rd b y 4 - b it “ p u sh -d o w n p o p -u p " P ro­ gram S ta ck. I t is designed to im p le m e n t Program C o u n te r PC and re tu rn address storage

LT0H30P

Abstract: LT0H30 LT0H30M Sharp Hologram laser laser diode 2.5mw laser for cd sharp hologram laser diode LT0H30M/LT0H30P optical servo ic TC
Contextual Info: Hologram Lasers LT0H30M/LT0H30P LT0H30M/LT0H30P • Features 1 In teg ra tes o f la ser d io d e, p h o to d io d e for sig n a l d etectio n , Hologram Laser for CD Player (3-beam) and prism into a s in g le p a ck a g e b y u s e o f h o lo g ra m (2) E a sy a s se m b ly and a d ju stm en t th a n k s to few er ex tern al

Digital Alarm Clock LED display

Abstract: led display alarm clock digital led clock with alarm digital clock with seconds and alarm time display circuit of alarm clock clock alarm circuit diagram digital led clock circuit diagram LED display for radio alarm schematic diagram Digital Alarm with Clock
Contextual Info: DISPLAY AND OPTOELECTRONIC DEVICES CLO CK MODULE LED DISPLAY DIGITAL ELECTRONIC CLOCK MODULE GENERAL DESCRIPTION 277-1001 PIN CONNECTION El ect ronic Clock Module c o m b i n e s a m ono li th ic M O S - L S I i nt e gr a te d c loc k c i r c ui t , 4 - d i g i t Cl.5 " L E D d i s p l a y , p o w e r s u p p l y a n d o t h e r a s s o c i a t e d d i s c r e t e

Contextual Info: s a mephy s i c a l pi ns noonboa r dpul l ups PD0( OC0B/ S CL / I NT 0)( 18) PD1( S DA/ I NT 1)( 19) ARE F( 42) GND( 15) PC7( I CP3/ CL K0/ OC4A)( 32) PD6( T 1/ # OC4D/ ADC9)( 26) PB7( PCI NT 7/ OCA0/ OC1C/ # RT S )( 12) PB6( PCI NT 6/ OC1B/ OC4B/ ADC13)(

HG62F

Abstract: V/HG62F HG62F43
Contextual Info: #U 210 HG62F SERIES Hitachi CMOS Gate Array High I/O to Gate Ratio JANUARY, 1990 0 H IT A C H I The F series consists of 6 masterslices ranging from 2,178 to 10,076 available gates with high I/O pin counts ranging from 136 pins to 208 pins. The HG62F series is a mastersliced gate array fabricated on 1.0

ddr3 pinout

Abstract: wrs4 MR1121
Contextual Info: PRELIMINARY INFORMATION L9D340G64BG2 4.0 Gb, DDR3, 64 M x 64 Integrated Module IMOD Benefits FEATURES DDR3 Integrated Module [iMOD]: s6CC6CC16Ò6 s6CENTER TERMINATED PUSHPULL )/ s0ACKAGEMMXMM X MATRIXWBALLS s-ATRIXBALLPITCHMM

0G7A-0191-98

Contextual Info: 4 T H IS DRAWING 0 IS C O P Y R IG H T U N P U B LIS H E D . RE L EA S ED 19 2 3 BY AMP I N C O RP O RA TE D . FOR ALL P U B LIC A TIO N RIG HTS ,19 LOC RE S E R V E D . REVI SI ONS D IS T 22 AA DESCRIPTION L TR D REV: DWN D ATE EC 0 G 7 A - 0 1 9 1 - 9 8

ST T8 3560

Abstract: ECH information
Contextual Info: ADVANCED 4 MEG X 32 SDRAM DIMM MICRON U TECVMOLOQY, MC. MT8LSD T 432U SYNCHRONOUS DRAM M O D U L E FEATURES PIN A S S I G N M E N T (Front View) * JED EC-standard pinout in a 100-pin, dual in-line * * * * * * * * * * * * m em ory m odule (DIMM) 16MB (4 M eg x 32)

Contextual Info: >O N Y I_ C X D 2 4 2 4 R Timing Generator for Progressive Scan CCD Image Sensor Description The CXD2424R is an 1C developed to generate the tinning pulses required by the Progressive Scan CCD image sensors as well as signal processing circuits.

Contextual Info: SONY CXD2424R Preliminary Timing Generator for Progressive Scan CCD Image Sensor Description The CXD2424R is an 1C developed to generate the timing pulses required by the Progressive Scan CCD image sensors as well as signal processing circuits. Features • CCIR support

Contextual Info: >ONY I_C X D 2 4 2 4 R Timing Generator for Progressive Scan CCD Image Sensor Description The CXD2424R is an 1C developed to generate the timing pulses required by the Progressive Scan CCD image sensors as well as signal processing circuits. Features

IN4144

Abstract: 434 MHZ crystal XTAL CT TRANSMITTER RECEIVER sensor FLC 100 TRANSISTOR MOTOROLA MAC 224 Nippon capacitors
Contextual Info: MOTOROLA Order this docum ent by: DSP56824/D SEMICONDUCTOR TECHNICAL DATA DSP56824 Advance Information 16-BIT DIGITAL SIGNAL PROCESSOR The DSP56824 is a member of the DSP56800 core-based family of Digital Signal Processors DSPs . This general purpose DSP combines processing power with configuration flexibility,