CMOS 4190 Search Results

16-BIT

Abstract: 18-BIT cmos 4190
Contextual Info: Selection Guide DOUBLE DENSITY 5V FCT CMOS LOGIC BALANCED ANSCD HIGH DRIVE OUTPUT SPEED GRADE X PART NUMBER DESCRIPTION BLANK A CD74FCT162240T Fast CMOS 16-Bit Buffer/Line Driver X X CD74FCT162244T Fast CMOS 16-Bit Buffer/Line Driver X X CD74FCT162245T Fast CMOS 16-Bit Bidirectional Transceiver

se617

Abstract: SE641 transistor f423 sd667 transistor hh 004 transistor f422 bv0T F423 n010x L442
Contextual Info: Block Library CMOS-9HD Family, EA-9HD Family CMOS Gate Array, CMOS Embedded Array Ver.6.0 Document No. Date Published A13052EJ6V0BL00 6th edition December 2000 NS CP(K) NEC Corporation 1997 Printed in Japan [MEMO] Block Library A13052EJ6V0BL Summary of Contents

JXXX

Abstract: AO16A
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM54190B MCM5L4190B MCM5V4190B Product Preview 256K x 18 CMOS Dynamic RAM Fast Page Mode - 1 CAS, 2 Write Enables The MCM54190B is a 0.6n CMOS high-speed dynamic random access memory. It is organized as 262,144 eighteen-bit words and fabricated with CMOS siiicon-gate pro­

diagram of hi 3520

Abstract: SK100ELT21W SK100ELT21WD SK100ELT21WDT SK10ELT21W SK10ELT21WD SK10ELT21WDT 100LVELT21
Contextual Info: SK10/100ELT21W Differential PECL to CMOS/TTL Translator PRELIMINARY HIGH-PERFORMANCE PRODUCTS Description Features The SK10/100ELT21W is a single differential PECL to CMOS/TTL Translator. Since PECL Positive ECL levels are used, only +VCC and ground are required.

a13493

Abstract: a1349 A13492 A13488 66244 A1348
Contextual Info: Ordering number : ENN*6624 CMOS IC LC35W1000BM, BTS-70U/10U Asynchronous Silicon Gate 1M 131,072 words x 8 bits SRAM Preliminary Overview Package Dimensions The LC35W1000BM and LC35W1000BTS-70U/10U are asynchronous silicon gate CMOS static RAM devices with

Contextual Info: MP, i 0 PRELIMINARY IND: -25 a PALLV22V1OZ-25 Advanced Micro Devices Low-Voltage, Zero-Power 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ Zero-power CMOS technology — 15 jiA standby current

diagram of hi 3520

Abstract: 100LVELT21 SK100ELT21W SK10ELT21W SK10ELT21WD SK10ELT21WDT
Contextual Info: SK10/100ELT21W Differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator HIGH-PERFORMANCE PRODUCTS Description Features • The SK10/100ELT21W is a single differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator. Since PECL Positive ECL levels are used, only +VCC

CD74FCT162827ATMT

Contextual Info: CD74FCT16827T, CD74FCT162827T, CD74FCT162H827T S E M I C O N D U C T O R Fast CMOS 20-Bit Buffers January 1998 Features Ordering Information • Advanced 0.6 micron CMOS Technology • These Devices Are High-speed, Low Power Devices with High Current Drive

AN1002

Abstract: AN1003 AN1006 SK100ELT21W SK10ELT21W
Contextual Info: SK10/100ELT21W Differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator HIGH-PERFORMANCE PRODUCTS Description Features • The SK10/100ELT21W is a single differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator. Since PECL Positive ECL levels are used, only +VCC

CD74FCT162827T

Abstract: CD74FCT16827ATMT CD74FCT16827ATSM CD74FCT16827BTMT CD74FCT16827BTSM CD74FCT16827CTMT CD74FCT16827CTSM CD74FCT16827T CD74FCT162827ATMT
Contextual Info: CD74FCT16827T, CD74FCT162827T S E M I C O N D U C T O R Fast CMOS 20-Bit Buffers December 1996 Features Ordering Information • Advanced 0.6 micron CMOS Technology • These Devices Are High-speed, Low Power Devices with High Current Drive TEMP. RANGE oC

LM35 SMD

Abstract: LMC555CN LMC555 555CM smd A3 pulse position modulation using 555 27AN 5962-8950305
Contextual Info: LMC555 CMOS Timer General Description Features The LMC555 is a CMOS version of the industry standard 555 series general purpose timers. In addition to the standard package SOIC, MSOP, and MDIP the LMC555 is also available in a chip sized package (8 Bump micro SMD) using

3205A

Contextual Info: Ordering number : ENN*7056 CMOS IC LC35V1000BM, BTS-70U Asynchronous Silicon Gate 1M 131,072 words x8 bits SRAM Preliminary Overview Package Dimensions The LC35V1000BM and LC35V1000BTS-70U are asynchronous silicon gate CMOS static RAM devices with a 131,072-word by 8-bit structure. They provide two chip

C2651

Contextual Info: QSFCT651T, 652T, 2651T, 2652T Q High Speed CMOS 8 -bit Bus Interface Register Transceivers QS54/74FCT651T qs 54 /74 fct 652 t / _ec v qS54/74fct2652t FEATURES/BENEFITS Pin and function compatible lo the 74F651/2 74FCT651/2 and 74FCT651T/2T CMOS power levels: <7.5 mW static

PALCE22v10 amd

Contextual Info: a PALCE22V1 OH-15/25/Q-25 Advanced Micro Devices 24-pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • As fast as 15 ns propagation delay and 50 MHz fMAx ■ Global asynchronous reset and synchronous preset for initialization ■ Low-power EE CMOS

SK10ELT22W

Abstract: SK10ELT22WD MC100ELT22 MC100LVELT22 SK100ELT22W 3975 8-PIN
Contextual Info: SK10/100ELT22W Dual LVTTL/LVCMOS to LVPECL or TTL/CMOS to PECL Translator HIGH-PERFORMANCE PRODUCTS Description Features • The SK10/100ELT22W is a dual LVTTL to LVPECL and TTL/CMOS to PECL translator. Because PECL /LVPECL levels are used, only VCC = 3.0 to 5.5V and ground are

Contextual Info: a Harris HI-5041/883 Dual SPST CMOS Analog Switch F eatures D escrip tio n • This Circuit is Processed in Accordance to M ll-S td 88 3 and is Fully Conform ant Under the Provisions of Paragraph 1.2.1. This CMOS analog switch offers low -resistance switching

Contextual Info: QS5244 Ô Preliminary Low Skew CMOS 8-Bit Buffers/Line Drivers Q S5244 F E A T U R E S /B E N E F IT S • • • • • 1,2ns on-chip skew opposite trans. 1,5ns skew between chips CMOS power levels: <7.5 mW static Available in PDIP, ZIP, SOIC, QSOP, CERDIP

IMS1600W-55M

Abstract: IMS1600 IMS1600S-45M IMS1600S-55M IMS1600W-45M
Contextual Info: IMS1600M CMOS High Performance 64K x 1 Static RAM MIL-STD-883C FEATURES D E S C R IP T IO N • Specifications guaranteed ove rfu ll military temperature range [ - 5 5 ° C to + 125 °C ) • MIL-STD-883C Processing • INMOS Very High Speed CMOS • Advanced Process —2 Micron Design Rules

Contextual Info: QSFCT651T, 652T, 2651T, 2652T Q Q S 54/74F C T 651T High Speed CMOS 8-bit Bus Interface Register Transceivers qs54/74fct652t qI m /tI fctmmt FE A T U R E S /B E N E FIT S • Pin and function compatible to the 74F651/2 74FCT651/2 and 74FCT651T/2T • CMOS power levels: <7.5 mW static

Contextual Info: ” Semiconductor, Inc. TC1411 TC1411N 1A HIGH-SPEED MOSFET DRIVERS FEATURES GENERAL DESCRIPTION • The TC1411/1411N are 1A CMOS buffer/drivers. They will not latch up under any conditions within their power and

LT22

Abstract: AZ100ELT22 AZ100ELT22D AZ100ELT22T AZ10ELT22 AZ10ELT22D AZ10ELT22T AZM10 ELT22 MC100ELT22
Contextual Info: ARIZONA MICROTEK, INC. AZ10ELT22 AZ100ELT22 CMOS/TTL to Differential PECL Translator PACKAGE AVAILABILITY FEATURES PACKAGE • Green / RoHS Compliant / Lead Pb Free package available • 0.5ns Typical Propagation Delay • <100ps Typical Output to Output

ttl nim translator

Abstract: AZ100ELT20 AZ100ELT20N AZ10ELT20 AZ10ELT20D AZM10 ELT20 MC100ELT20 SY89329V LT-201
Contextual Info: ARIZONA MICROTEK, INC. AZ10ELT20 AZ100ELT20 CMOS/TTL to Differential PECL Translator PACKAGE AVAILABILITY FEATURES • • • • • • PACKAGE 0.5ns Typical Propagation Delay Differential PECL Outputs Flow Through Pinouts Operating Range of +3.0V to +5.5V

mb87006

Abstract: TRANSISTOR B0413 transistor bf 175
Contextual Info: Introduction and Quick Selection Guide Prescalers CMOS Phase—Locked Loops PLLs Super PLLs (Single Chip PLLs/Prescalers) Super Analog RF Devices BiCMOS LSI RF Integrated Circuits Piezoelectric Devices/SAW Filters Power Management Switches Application Notes and Articles

AZM100ELT22

Abstract: AZHLT22 max2580 AZ100ELT22 AZ100ELT22D AZ100ELT22DR1 AZ100ELT22DR2 AZ10ELT22 AZ10ELT22D AZ10ELT22DR2
Contextual Info: ARIZONA MICROTEK, INC. AZ10ELT22 AZ100ELT22 Dual CMOS/TTL to Differential PECL Translator FEATURES • • • • • • PACKAGE AVAILABILITY 0.5ns Typical Propagation Delay <100ps Typical Output to Output Skew Differential PECL Outputs Flow Through Pinouts