COS V21 L10 Search Results

VAA33

Abstract: AA36 ZSF200
Contextual Info: Switch Fabric Data Sheet 89TSF552 Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.

Contextual Info: 89TSF552 Switch Fabric Data Sheet Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.

VAA33

Abstract: cos v21 l10 aw26
Contextual Info: Switch Fabric Data Sheet 89TSF552 Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.

VAA33

Abstract: cos v21 l10
Contextual Info: Switch Fabric Data Sheet Description Variable length CSIX payload up to 132 bytes that supports any type of traffic. ◆ Virtual output queues (VOQs) in the ingress direction that eliminate head-of-line blocking. The 256 unicast VOQs provide: – A maximum of 32 ports with 8 CoS, or

VAA33

Abstract: ZSF200 AA36
Contextual Info: Switch Fabric Data Sheet Description 89TSF5xx Features Up to 32 switch ports, with 24 Gbps available per switch port. Variable length CSIX payload up to 132 bytes that supports any type of traffic. ◆ Virtual output queues (VOQs) in the ingress direction that

VAA33

Abstract: 3 pins LDR Datasheet am2 heat sink mechanism -intel AM2 Processor Functional Data Sheet amkor flip LOGO AM2 AA36 ZSF200
Contextual Info: 89TSF500 Switch Fabric Data Sheet Preliminary Information* Description Variable length CSIX payload up to 132 bytes that supports any type of traffic. ◆ Virtual output queues (VOQs) in the ingress direction that eliminate head-of-line blocking. The 256 unicast VOQs

radix-8 FFT

Abstract: DBGA KD 472 M mov CMAC A15B2 sc sf 12A H4 17ER CI23 honeywell hx3000 HX3000
Contextual Info: DSP Architectures RHDSP24 Radiation Hardened Scalable DSP Chip Transform Your WorldTM Data Sheet Real 24 PORT A Imag 24 RHDSP24 Imag 24 24 24 X INPU TB US Y INPUT BU S O U TP U TB US 24 48 Imag 24 Scheduler/ Controller X Y Memory A 24 Memory B 24 System Controls

Video sync splitter vga

Abstract: AFE8406 GC5316 code for NCO Desensitization
Contextual Info: 14-Bit, 85 MSPS Dual ADC, 8-Channel Wideband Receiver SLWS168 - OCTOBER 2005 Product Preview AFE8406 FEATURES • • • • • • • • • • • • • 14-bit 85 MSPS high performance dual ADC The dual ADC can be configured into single ADC At Fin=140MHz, SNR>=68dB, SFDR>=70dBc

R96FAX

Contextual Info: MODEM PRODUCTS DATA BOOK <1 Rockwell International Semiconductor Products Division Rockwell International Corporation 1987 All Rights Reserved Printed in U.S.A. Order No. 1 February, 1987 Rockwell Sem iconductor Products Division is headquartered in Newport Beach, California with Field

AFE8405

Abstract: AFE8405IZDQ CDMA2000-1X
Contextual Info: AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS212 – OCTOBER 2008 1 Introduction 1.1 FEATURES • • • • • • • • 14-Bit 85-MSPS High-Performance Single ADC At fin = 140 MHz, SNR ≥ 71 dBFS, SFDR ≥ 79 dBc At fin = 70 MHz, SNR ≥ 73 dBFS,

Contextual Info: AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS212A – OCTOBER 2008 – REVISED JANUARY 2009 1 Introduction 1.1 FEATURES • • • • • • • • 14-Bit 85-MSPS High-Performance Single ADC At fIN = 140 MHz, SNR ≥ 71 dBFS,

FIFO181

Abstract: operational amplifier kW 0x0480 FUSE MARKING AA3 Video sync splitter vga CDMA2000-1X AFE8405 AFE8405IZDQ AFE8406 DDC6
Contextual Info: AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS212A – OCTOBER 2008 – REVISED JANUARY 2009 1 Introduction 1.1 FEATURES • • • • • • • • 14-Bit 85-MSPS High-Performance Single ADC At fIN = 140 MHz, SNR ≥ 71 dBFS,

lfsr16

Abstract: B0129 B011801
Contextual Info: AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS212A – OCTOBER 2008 – REVISED JANUARY 2009 1 Introduction 1.1 FEATURES • • • • • • • • 14-Bit 85-MSPS High-Performance Single ADC At fIN = 140 MHz, SNR ≥ 71 dBFS,

Contextual Info: AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS212A – OCTOBER 2008 – REVISED JANUARY 2009 1 Introduction 1.1 FEATURES • • • • • • • • 14-Bit 85-MSPS High-Performance Single ADC At fIN = 140 MHz, SNR ≥ 71 dBFS,

ADV8005

Abstract: tx2c transmitter tx-2c
Contextual Info: NatureVue Video Signal Processor with Bitmap OSD, Dual HDMI Tx, and Encoder ADV8005 Data Sheet FEATURES Easy to use software tool for developing OSDs HDMI transmitters Dual 4k x 2k HDMI transmitters Audio return channel ARC support Dual audio insertion from TMDS Rx or from audio input pins

diode code GW 17

Abstract: AFE8406IZDQ b0107 Video sync splitter vga AFE8406 CDMA2000-1X FIFO181 BGA484
Contextual Info: AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS168C – MAY 2005 – REVISED OCTOBER 2008 1 Introduction 1.1 FEATURES • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

analog kw meter cic circuit diagram

Abstract: 0X070
Contextual Info: www.ti.com AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS168B1 – MAY 2005 – REVISED MARCH 2006 1 Introduction 1.1 FEATURES • • • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

VGA TO AV CONVERTER

Abstract: M5 DIODE 22-35 fuse n15 2 way video splitter circuit diagram 8 channel audio amplifier circuit diagram adcb 27 ADT1-1WT introduction of automatic phase selector FUSE MARKING AA3 cdma power meter block diagram
Contextual Info: www.ti.com AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS168B1 – MAY 2005 – REVISED MARCH 2006 1 Introduction 1.1 FEATURES • • • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

B0126

Contextual Info: AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS168C – MAY 2005 – REVISED OCTOBER 2008 1 Introduction 1.1 FEATURES • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

AFE8406

Abstract: AFE8406IZDQ CDMA2000-1X PSUEDO RANDOM SEQUENCE GENERATOR WCDMA receiver UMTS baseband
Contextual Info: www.ti.com AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS168A – MAY 2005 – REVISED FEBRUARY 2006 1 Introduction 1.1 • • • • • • • • • • • FEATURES 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

OPA847

Contextual Info: www.ti.com AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS168B – MAY 2005 – REVISED MARCH 2006 1 Introduction 1.1 • • • • • • • • • • • FEATURES 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

Contextual Info: www.ti.com AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS168B1 – MAY 2005 – REVISED MARCH 2006 1 Introduction 1.1 FEATURES • • • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

Contextual Info: Traffic Manager Data Sheet 89TTM552 Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to

bap21

Abstract: 89TTM553 ZTM200 BAT23 BAU21
Contextual Info: Traffic Manager Data Sheet 89TTM552 Preliminary Information* Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to