CSR BC5 PIN Search Results
CSR BC5 PIN Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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MG80C196KB |
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80C196KB - Microcontroller, 16-bit, MCS-96, 68-pin Pin Grid Array (PGA) |
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PAL16L8B-4MJ/BV |
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PAL16L8B - 20 Pin TTL Programmable Array Logic |
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PAL16L8-7PCS |
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PAL16L8 - 20-Pin TTL Programmable Array Logic |
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54F191/Q2A |
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54F191 - Up/Down Binary Counter with Preset and Ripple Clock. Dual marked as DLA PIN 5962-90582012A. |
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0804MC |
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0804MC 8-Pin TO-3 Socket |
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CSR BC5 PIN Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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bc5 csr
Abstract: CSR BC5 MB-C05-A2DP MB-C05-AT CSR Bluetooth MBC05 CSR BC5 PIN Bluetooth CSR BC5 BlueCore-05 block diagram bluetooth headset
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MB-C05-A2DP MB-C05-AT 04-July-09 BlueCore05 MB-C05-AT, MB-C05-AT bc5 csr CSR BC5 MB-C05-A2DP CSR Bluetooth MBC05 CSR BC5 PIN Bluetooth CSR BC5 BlueCore-05 block diagram bluetooth headset | |
Contextual Info: m i CELESTICA. 2M x 32 EDO SIMM FEATURES 72-pin industry standard four-byte single-in-line memory module JEDEC compliant: 21 -C Fig. 4-18 A,B, Fig. 4-6 Release 6 No.95 MO-116 Supports 90°, 40° and 22.5° connectors High performance, CMOS Single 5V ± 10% power supply |
OCR Scan |
72-pin MO-116 C55-BEFORE-RS5, 20431C) 4414C | |
BST60Contextual Info: TOSHIBA TC5116405BSJ/BST60 PRELIMINARY 4,194,304 WORD X 4 BIT DYNAMIC RAM Description The T C 51 16405BSJ/BST is the new generation dynamic RAM organized 4,194,304 w ord by 4 bits. The T C 51 16405B SJ/ BST utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operat |
OCR Scan |
TC5116405BSJ/BST60 16405BSJ/BST 16405B TC5116405BSJ/BST 300mil) TC5116405BS J/BST-60 DR16060295 BST60 | |
tcd 142Contextual Info: HB56UW272EJN-6B/7B 2,097,152-word x 72-bit High Density Dynamic RAM Module 168-pin JEDEC Standard Outline Unbufferd 8 byte DIMM HITACHI ADE-203-586A Z Preliminary - Rev. 0.1 May. 23, 1996 Description The HB56UW272EJN belongs to 8 Byte DIMM (Dual In-line Memory Module) family, and has been |
OCR Scan |
HB56UW272EJN-6B/7B 152-word 72-bit 168-pin ADE-203-586A HB56UW272EJN 16-Mbit HM51W17805BJ) 24C02) tcd 142 | |
csr bc7
Abstract: YGV604 at3 block diagram
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OCR Scan |
YGV604 csr bc7 YGV604 at3 block diagram | |
TC5117405
Abstract: BST60
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OCR Scan |
TC5117405BSJ/BST TC5117405BSJ/ 300mil) TC5117405BSJ/BST-60/70 DR16070295 TC5117405 BST60 | |
LOG RX2 1108
Abstract: tnetv3020 TMS320C6472 iso 7812 02C2BFFF 028A00 117FFFF 112Bf TCI6486 02AE0000
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TMS320C6472 SPRS612G TMS320C6472 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) LOG RX2 1108 tnetv3020 iso 7812 02C2BFFF 028A00 117FFFF 112Bf TCI6486 02AE0000 | |
0260f
Abstract: BC5 CSR
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TMS320C6472 SPRS612G TMS320C6472 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) 0260f BC5 CSR | |
SPRA753
Abstract: monitor philips 190c Application Note A008
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TMS320C6472 SPRS612C TMS320C6472 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) SPRA753 monitor philips 190c Application Note A008 | |
Contextual Info: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller |
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TMS320C6472 SPRS612D TMS320C6472 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) | |
Contextual Info: TMS320TCI6486 SPRS300N – FEBRUARY 2006 – REVISED JULY 2011 www.ti.com TMS320TCI6486 Communications Infrastructure Digital Signal Processor 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian • C64x+ Megamodule Main Features: |
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TMS320TCI6486 SPRS300N TMS320TCI6486 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) | |
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 1.1 www.ti.com CTZ/ZTZ BGA Package Bottom View The TMS320C6472 devices are designed for a package temperature range of 0°C to 85°C (commercial temperature range) or -40°C to 100°C (extended temperature range). |
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TMS320C6472 SPRS612G TMS320C6472 500-MHz 625-MHz 737-Pin | |
C6000
Abstract: DDR2-533 TMS320C6000 CSR BC5 LOG TX2 1108 rx2freebuffer rgmii specification tnetv Y10-Y12 002BFF
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TMS320C6472 SPRS612F TMS320C6472 8/16-Bit C6000 DDR2-533 TMS320C6000 CSR BC5 LOG TX2 1108 rx2freebuffer rgmii specification tnetv Y10-Y12 002BFF | |
TMS3TCI6486BZTZ625Contextual Info: TMS320TCI6486 SPRS300N – FEBRUARY 2006 – REVISED JULY 2011 www.ti.com TMS320TCI6486 Communications Infrastructure Digital Signal Processor 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian • C64x+ Megamodule Main Features: |
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TMS320TCI6486 SPRS300N TMS320TCI6486 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) TMS3TCI6486BZTZ625 | |
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Contextual Info: SM320C6472-HiRel www.ti.com SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010 SM320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller |
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SM320C6472-HiRel SPRS696B SM320C6472 8/16-Bit | |
Contextual Info: TMS320C6472 www.ti.com SPRS612E – JUNE 2009 – REVISED OCTOBER 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller |
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TMS320C6472 SPRS612E TMS320C6472 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) | |
CSR BC5
Abstract: C6472 SMC tr12
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TMS320C6472 SPRS612G TMS320C6472 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) CSR BC5 C6472 SMC tr12 | |
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller |
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TMS320C6472 SPRS612G TMS320C6472 8/16-Bit | |
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller |
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TMS320C6472 SPRS612G TMS320C6472 8/16-Bit | |
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller |
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TMS320C6472 SPRS612G TMS320C6472 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) | |
CSR BC5
Abstract: TX01 TMS320C64x DSP Megamodule Reference Guide
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TMS320C6472 SPRS612G TMS320C6472 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit 32K-Byte) CSR BC5 TX01 TMS320C64x DSP Megamodule Reference Guide | |
SCR RC10
Abstract: tim02 a15 c15 106c 12p 02B07FFF 02C30000 fcbga package weight TMS320C6000 C6000 0257FFFF LOG RX2 0808
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SM320C6472-HiRel SPRS696B SM320C6472 8/16-Bit SCR RC10 tim02 a15 c15 106c 12p 02B07FFF 02C30000 fcbga package weight TMS320C6000 C6000 0257FFFF LOG RX2 0808 | |
SPRM316
Abstract: C6000 DDR2-533 TCI6486 TMS320C6000 TMS320TCI6486 CSR BC5 TMS320TCI6486ZTZ 070CH
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TMS320TCI6486 SPRS300I TMS320TCI6486 TMS320C64x+ 32-Bit 16-Bits) 16-Bit) 256K-Bit SPRM316 C6000 DDR2-533 TCI6486 TMS320C6000 CSR BC5 TMS320TCI6486ZTZ 070CH | |
MDIO controller
Abstract: C6000 DDR2-533 TMS320C6000 TMS320C64x DSP Megamodule Reference Guide BED02
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TMS320C6472 SPRS612B TMS320C6472 8/16-Bit MDIO controller C6000 DDR2-533 TMS320C6000 TMS320C64x DSP Megamodule Reference Guide BED02 |