CTET Search Results

2SA1624

Contextual Info: 2S A 1624 PN P Epitaxial P lanar Silicon T ransistor Color TV Chroma O utput, High-Voltage Driver Applications M F e a tu r e s / * High breakdown voltage / / « • Small reverse transfer capacitance and excellent high frequency qKV^ctetis'%js^im^ - Adoption

TAS-2520

Contextual Info: ^EDI EDI8F2432C Bftcfranlc Ctetigr» Ine. High Speed 750Kbit SRAM Module 32Kx24 Static RAM CMOS, High Speed Module P iilD it liâ Ë Ï Features The EDI8F2432C is a high speed 750Kbit Static RAM module organized as 32Kx24. This module is constructed from three 32Kx8 Static R AMs in SOJ packages on an epoxy

er36 transformer

Contextual Info: S TANDARD PRO DUCT PM PMC-Sierra, inc. PM 7345 S/UNI-PDH ISSUE 5 SATURN User Network Interface forPD H PM7345 S/UNI- fTM PDH S/UNI-PDH S A T U R N U s e r N e t w o r k I n t e r f a c e for A T M P l e s i o c h r o n o u s Di gi t al H i e r a r c h y Pre lim ina ry

5 PEN PC TECHNOLOGY apllications

Contextual Info: DATA SHEET PM PMC-970113 ISSUE 3 PMC-Sierra, Inc. PM3351 e l a n 1x100 SINGLE PORT FAST ETHERNET SWITCH PM3351 ELAN 1X100 SINGLE PORT FAST ETHERNET SWITCH DATA SHEET ISSUE 3: FEBRUARY 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

UPS SIEMENS

Abstract: SMD IC MARKING GP a1s smd AD211 as3 SMD Transistor siemens sab 82532 transistor SMD MARKING CODE nx smd transistor marking a2h smd marking ARB b32 siemens
Contextual Info: S IE M E N S ICs for Communications Multichannel Network Interface Controller for HDLC with Extensions MUNICH32X PEB 20321 Version 2.1 Preliminary Data Sheet 01.98 DS 1 This Material Copyrighted By Its Respective Manufacturer Edition 1998-01-23 This edition was realized using the software

Contextual Info: PRELIMINARY AMD£I Am79C983A Integrated Multiport Repeater 2 IMR2 DISTINCTIVE CHARACTERISTICS • Repeater functionality compliant with IEEE 802.3 Repeater Unit specifications ■ Hardware implementation of Management Information Base (MIB) with all of the counters,

Contextual Info: Â - ' PHY TC-PMD for 25.6 and 51.2 Mbps ATM Networks fffJSX Wdt) IDT77105 In teg rated D evice Technology, Inc. DESCRIPTION FEATURES • Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for 25.6 Mpbs and 51.2 Mbps ATM Networks

HD63183

Contextual Info: Under Development H D63185- D ocum ent Im age Com pression and Expansion Processor Enhanced DICEP-E DICEP-E is an LSI th a t perform s com pression (encoding) and expansion (decoding) of 2value d a ta used to rep resen t a docum ent image. It is positioned a t th e high en d of th e

Contextual Info: H D63085-Document Image Compression and Expansion Processor D I C E P The DICEP is an LSI that performs com pres­ sion (encoding) and expansion (decoding) of th e digital (tw o-value) data rep resen tin g a docum ent im age. The DICEP is u sed in G3 and G4 facsim ile

HD63183

Contextual Info: H D 6 3 1 8 3 - D ocum ent Im age Compression and Expansion Processor A dvanced D I C E P - A HD63183 DICEP-A performs compression (encoding) and expansion (decoding) of the

SMD transistor 6c

Abstract: siemens ecu marking code B9 DG SMD Transistor nat4 smd CHN 842 marking BARX A23i as3 SMD Transistor CHN 841 marking code E3 SMD ic
Contextual Info: S IE M E N S ICs for Communications Multichannel Extensions MUNICH32X Network Interface Controller for HDLC with PEB 20321 Version 1.1 Preliminary Data Sheet 10.96 T 20 32 -1 V 11 -D1 -7600 This Material Copyrighted By Its Respective Manufacturer Edition 10.96

STM CL-80

Abstract: acp ca14 AD10 AD14 TXC-05551
Contextual Info: SARA-2 ATM Cell Processing 1C Device TXC-05551 DATA SHEET PRODUCT PREVIEW DESCRIPTION Test Access Port SARA-2 is a single-chip solution using feature/ application-specific microcode that performs complete segmentation and reassembly SAR for implementing

NEC V20

Abstract: 82c11 PPI 8255 interface with 8086 V30 CPU explain the 8288 bus controller 10G APD chip NEC 2561 8255 interface with 8086 Peripheral 82C601 intel 8284 clock generator
Contextual Info: CHIPS p r e l i m in a r y 82C 110 IBM PS/2 MODEL 30 AND SUPER XT” COMPATIBLE CHIP m Key superset features: EMS control, dual • 100% PC/XT compatible clock, and 2.5 MB DRAM support ■ Build IBM PS/2™ Model 30 with XT softw an compatibility ■ Bus Interface compatible with 8086,80086,

HD10230

Contextual Info: H D 10230 H ig h S p e e d D u a l D - t y p e L a t c h e s The H D 1 0 2 3 0 is a clo c ke d dual D type latch. Each latch m a y be clocke d separately by h o ld in g the co m m o n c lo c k in the lo w state, and u sin g the clo c k enable in p u ts fo r the clo c k in g fu n ctio n . If

Contextual Info: BROOKTREE CORP b3E B • 1^455^5 DDQ7G3T Interface Specification IS-210.15 SMDS C o n tro l and R e a sse m b ly F o r m a tte r Part # UGA-210 M arch, 1993 Brooktree Brooktree Corporation 9950 Barnes Canyon Road San Diego, CA 92121 USA 6 1 9 -4 5 2 -7 5 8 0

Contextual Info: TO SHIBA ADVANCE INFORMATION TC74VCX16841 FT TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC Tf74UfY1fiRdlFT LOW-VOLTAGE 20-BIT D-TYPE LATCH WITH 3.6V TOLERANT INPUTS AND OUTPUTS The TC74VCX16841 FT is a high performance CMOS 20-bit D-TYPE LATCH. Designed for use in 1.8, 2.5 or 3.3 Volt

5196S

Abstract: 332h 735h tran. 336H tsn7 339H 451H 001H 101H 200H
Contextual Info: S/UNI -4xD3F Data Sheet Released PM7349 S/UNI4xD3F TM S/UNI-4xD3F Quad J2, E3 and DS-3 Framer Data Sheet Released Issue 5: June 2001 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2000314, Issue 5

Contextual Info: TO SHIBA TC74VCX16245FT TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74VCX16245FT LOW-VOLTAGE 16-BIT BUS TRANSCEIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS The TC74VCX16245FT is a high performance CMOS 16-bit BUS TRANSCEIVER. Designed for use in 1.8, 2.5 or 3.3

b589n

Abstract: B511N information applikation b589 mikroelektronik Heft 12 information applikation mikroelektronik B589nm "Mikroelektronik" Heft aktive elektronische bauelemente ddr applikation heft
Contextual Info: r r j f c n B e le l- f t e n o n f l- t Information Applikation raeo [ n n f l k l n i B ] B l B | < t i n a r * < Information Applikation HEÏI 4 4 : B 5 1 1 N Twnperatur-Sensor-IS B 5 8 9 I Bandgap-Referenzepannungaguelle m KAMMER OER TECHNIK Ebvftuu traft« 2, Frankfurt (Od*r

Contextual Info: Data Sheet August 1996 mi c r o e l e c t r o n i c s gr oup Lucent Technologies Bell Labs Innovations • Four 10 Mbits/s Ethernet transceivers and MACs integrated together with separate transmit and receive port FIFOs and a single DMA interface simplity the design of a frame-switching hub. Each

Contextual Info: INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER TXC • Supports All 3V Pentium Processors ■ Dual Processor Support ■ PCI 2.1 Com pliant ■ Integrated Second-Level Cache Controller — — — — — — — — — ■ ■ — — Direct Mapped Organization

Contextual Info: Preliminary XR-T7234 «/ E3 UNI User Network Interface 1C for ATM December 1997-1 FEATURES • APPLICATIONS C om pliant w ith U T O P IA Level 2 Interface Specification • S upports 8 or 16 Bit U T O P IA Bus O perating at 25M H z or 33M H z or 50M H z

JR 608H

Abstract: BEE 7CA atm8 deb hex nv AG75
Contextual Info: DATASHEET PM PMC-960835 ISSUE 4 PRELIMINARY PMC-Sierra, Inc. PM7346 s / u n i - q j e t SA TURN QUAD USER NETWORK INTERFA CE FOR J2, E3, T3 PM7346 S/UNI“ QJET S/UNI-QJET SATURN QUAD USER NETWORK INTERFACE FOR J2/E3/T3 DATA SHEET PRELIMINARY ISSUE 4: JANUARY 1998

rsm 2814

Contextual Info: 1.0 Product Description - The Bt8209 and Bt8210 Switched Multimegabit Data Service SMDS Control and Reassembly Formatters (SCARF) provide a single-access SMDS service ter­ mination for connectionless data, “datagram,” transfer according to Bellcore TRTSV-000772 and TR-TSV-000773. Customer Premise Equipment (CPE) and