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    CTSLVEL16VVRLG Search Results

    CTSLVEL16VVRLG Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CTSLVEL16VVRLG CTS Interface - Signal Buffers, Repeaters, Splitters, Integrated Circuits (ICs), LVPECL OSC GAIN STAGE & BUFFER Original PDF

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    marking+3610

    Abstract: No abstract text available
    Text: CTSLVEL16VV Dual Frequency PECL/ECL Oscillator Gain Stage & Buffer with Enable MLP16 Features     Block Diagram Minimizes External Components Similar Operation as CTSLVEL16VR except with Selectable Data Input Pairs High Bandwidth for 1GHz -147 dBc/Hz Typical Noise Floor


    Original     		PDF CTSLVEL16VV MLP16 CTSLVEL16VR CTSLVEL16VV CTSLVEL16 RevA1113 CTSLVEL16VVRLG marking+3610