CY7C1314JV18 Search Results

CY7C1314JV18 Price and Stock

Filter by Manufacturer


Rochester Electronics LLC CY7C1314JV18-250BZXC IC SRAM 18MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1314JV18-250BZXC	Tray			9	1 - 10 $34.96 100 $34.96 1000 $34.96 10000 $34.96	Buy Now
Infineon Technologies AG CY7C1314JV18-250BZXC IC SRAM 18MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1314JV18-250BZXC	Tray				1 - 10 - 100 - 1000 - 10000 -	Buy Now
Cypress Semiconductor CY7C1314JV18-250BZXC SRAM Chip Sync Single 1.8V 18M-bit 512K x 36 0.45ns 165-Pin FBGA Tray
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Verical	CY7C1314JV18-250BZXC		236		9	1 - 10 $42.025 100 $39.5 1000 $35.725 10000 $35.725	Buy Now
	CY7C1314JV18-250BZXC		50		9	1 - 10 $42.025 100 $39.5 1000 $35.725 10000 $35.725	Buy Now
Rochester Electronics	CY7C1314JV18-250BZXC		289		1	1 $33.62 10 $33.62 100 $31.6 1000 $28.58 10000 $28.58	Buy Now

CY7C1314JV18 Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
CY7C1314JV18-250BZXC		Cypress Semiconductor	18 Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V		Original	PDF

CY7C1314JV18 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 18 Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1310JV18 – 2M x 8 CY7C1910JV18 – 2M x 9	Original	PDF	CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 CY7C1310JV18 CY7C1312JV18
Untitled Abstract: No abstract text available Text: CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 18-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1310JV18 – 2M x 8 CY7C1910JV18 – 2M x 9	Original	PDF	18-Mbit CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 CY7C1310JV18 CY7C1910JV18 CY7C1312JV18
Untitled Abstract: No abstract text available Text: CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 18 Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■	Original	PDF	CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 CY7C1310JV18 CY7C1312JV18
Untitled Abstract: No abstract text available Text: THIS SPEC IS OBSOLETE Spec No: 001-43127 Spec Title: CY7C1310JV18/CY7C1910JV18/CY7C1312JV18/ CY7C1314JV18, 18-MBIT QDR R -II SRAM 2WORD BURST ARCHITECTURE Sunset Owner: Jayasree Nayar (NJY) Replaced by: NONE CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18	Original	PDF	CY7C1310JV18/CY7C1910JV18/CY7C1312JV18/ CY7C1314JV18, 18-MBIT CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 CY7C1310JV18