CY7C1315JV18 Search Results

CY7C1315JV18 Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
CY7C1315JV18-300BZC		Cypress Semiconductor	18-Mbit QDR(R) II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V	Original	PDF	451.4KB	27
CY7C1315JV18-300BZXC		Cypress Semiconductor	18-Mbit QDR(R) II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V	Original	PDF	451.4KB	27

CY7C1315JV18 Price and Stock

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Infineon Technologies AG CY7C1315JV18-300BZC IC SRAM 18MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1315JV18-300BZC	Tray				1 - 10 - 100 - 1000 - 10000 -	Buy Now
Infineon Technologies AG CY7C1315JV18-300BZXC IC SRAM 18MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1315JV18-300BZXC	Tray				1 - 10 - 100 - 1000 - 10000 -	Buy Now
Cypress Semiconductor CY7C1315JV18-300BZC QDR SRAM, 512KX36, 0.45ns, CMOS, PBGA165
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	CY7C1315JV18-300BZC		3,463		1	1 - 10 - 100 $32.21 1000 $28.82 10000 $27.13	Buy Now
Cypress Semiconductor CY7C1315JV18-300BZXC QDR SRAM, 512KX36, 0.45ns PBGA165
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	CY7C1315JV18-300BZXC		588		1	1 - 10 - 100 $32.21 1000 $28.82 10000 $27.13	Buy Now

CY7C1315JV18 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: CY7C1311JV18, CY7C1911JV18 CY7C1313JV18, CY7C1315JV18 18-Mbit QDR II SRAM 4-Word Burst Architecture Features Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions CY7C1311JV18 – 2M x 8 ■ 300 MHz Clock for High Bandwidth	Original	18-Mbit CY7C1311JV18, CY7C1911JV18 CY7C1313JV18, CY7C1315JV18 CY7C1311JV18 CY7C1911JV18 CY7C1313JV18	PDF
Contextual Info: CY7C1311JV18/CY7C1911JV18 CY7C1313JV18/CY7C1315JV18 18-Mbit QDR II SRAM 4-Word Burst Architecture Features Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions CY7C1311JV18 – 2M x 8 ■ 300 MHz Clock for High Bandwidth	Original	CY7C1311JV18/CY7C1911JV18 CY7C1313JV18/CY7C1315JV18 18-Mbit CY7C1311JV18 CY7C1313JV18 CY7C1315JV18	PDF