CY7C1386D Search Results
CY7C1386D Price and Stock
Rochester Electronics LLC CY7C1386D-167AXCTIC SRAM 18MBIT PAR 100TQFP |
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CY7C1386D-167AXCT | Bulk | 5,245 | 12 |
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Rochester Electronics LLC CY7C1386D-167AXCIC SRAM 18MBIT PAR 100TQFP |
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CY7C1386D-167AXC | Tray | 1,127 | 12 |
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Rochester Electronics LLC CY7C1386D-200AXCIC SRAM 18MBIT PARALLEL 100TQFP |
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CY7C1386D-200AXC | Tray | 671 | 12 |
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Rochester Electronics LLC CY7C1386D-167AXCKJIC SRAM 18MBIT PAR 100TQFP |
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CY7C1386D-167AXCKJ | Bulk | 526 | 14 |
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FLIP ELECTRONICS CY7C1386D-200AXCIC SRAM 18MBIT PARALLEL 100TQFP |
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CY7C1386D-200AXC | Tray | 25 |
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CY7C1386D Datasheets (12)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | PDF Size | Page count | |
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CY7C1386D |
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18-Mbit (512K x 36/1M x 18) Pipelined DCD Sync SRAM | Original | 471.46KB | 30 | |||
CY7C1386D-167AXC |
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18-Mbit (512K x 36/1M x 18) Pipelined DCD Sync SRAM | Original | 471.46KB | 30 | |||
CY7C1386D-167AXC |
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Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 167MHZ 100TQFP | Original | 38 | ||||
CY7C1386D-167AXCT |
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18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V | Original | 857.37KB | 31 | |||
CY7C1386D-167AXCT |
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Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 167MHZ 100TQFP | Original | 38 | ||||
CY7C1386D-200AXC |
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18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM | Original | 857.37KB | 31 | |||
CY7C1386D-200AXC |
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Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 200MHZ 100TQFP | Original | 38 | ||||
CY7C1386D-200AXCT |
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18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V | Original | 857.37KB | 31 | |||
CY7C1386D-200AXCT |
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Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 200MHZ 100TQFP | Original | 38 | ||||
CY7C1386D-250AXC |
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18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM | Original | 471.14KB | 29 | |||
CY7C1386DV25 |
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18-Mbit (512K x 36/1M x 18) Pipelined DCD Sync SRAM | Original | 465.9KB | 32 | |||
CY7C1386DV25-167AXC |
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18-Mbit (512K x 36/1M x 18) Pipelined DCD Sync SRAM | Original | 465.9KB | 32 |
CY7C1386D Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■ |
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CY7C1386D CY7C1387D 18-Mbit | |
Contextual Info: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■ |
Original |
CY7C1386D CY7C1387D 18-Mbit CY7C1386D/CY7C1387D | |
Contextual Info: CY7C1386D CY7C1387D PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 225, 200 and 167 MHz • Registered inputs and outputs for pipelined operation |
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CY7C1386D CY7C1387D 18-Mbit 36/1M 250-MHz 225-MHz 200-MHz 167-MHz | |
Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-05548 Spec Title: CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/ CY7C1387FV25 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Sunset Owner: N Vijay Kumar (VKN) Replaced by: None CY7C1386DV25, CY7C1386FV25 CY7C1387DV25, CY7C1387FV25 |
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CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/ CY7C1387FV25 18-Mbit 36/1M CY7C1386DV25, CY7C1386FV25 CY7C1387DV25, CY7C1387FV25 | |
CY7C1387D
Abstract: CY7C1386D
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CY7C1386D CY7C1387D 18-Mbit 250-MHz 200-MHz 167-MHz 119-BGA CY7C1387D CY7C1386D | |
CY7C1386D
Abstract: CY7C1387D
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CY7C1386D CY7C1387D 18-Mbit 250-MHz 200-MHz 167-MHz CY7C1386D CY7C1387D | |
Contextual Info: CY7C1386DV25 CY7C1387DV25 PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 225, 200, and 167 MHz • Registered inputs and outputs for pipelined operation |
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CY7C1386DV25 CY7C1387DV25 18-Mbit 36/1M 250-MHz 225-MHz 200-MHz 167-MHz | |
Contextual Info: CY7C1386DV25 CY7C1387DV25 PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation |
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CY7C1386DV25 CY7C1387DV25 18-Mbit 36/1M 250-MHz 200-MHz 167-MHz | |
Contextual Info: CY7C1386DV25, CY7C1386FV25 CY7C1387DV25, CY7C1387FV25 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description [1] Features • Supports bus operation up to 250 MHz The CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/ CY7C1387FV25 SRAM integrates 512K x 36 and 1M x 18 |
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CY7C1386DV25, CY7C1386FV25 CY7C1387DV25, CY7C1387FV25 18-Mbit 36/1M CY7C1386DV25/CY7C1387DV25 CY7C1387FV25 | |
Contextual Info: CY7C1386D CY7C1387D 18-Mbit 512K x 36/1 Mbit x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation |
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CY7C1386D CY7C1387D 18-Mbit 250-MHz 200-MHz 167-MHz | |
AN1064
Abstract: CY7C1386D CY7C1386F CY7C1387D CY7C1387F
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CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F 36/1M CY7C1386F AN1064 CY7C1386D CY7C1387D CY7C1387F | |
CY7C1386D
Abstract: CY7C1387D
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CY7C1386D CY7C1387D 18-Mbit 250-MHz 200-MHz 167-MHz CY7C1386D/CY7C1387D CY7C1386D CY7C1387D | |
AN1064
Abstract: CY7C1386D CY7C1386F CY7C1387D CY7C1387F
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CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit 36/1-Mbit CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F AN1064 CY7C1386D CY7C1386F CY7C1387D CY7C1387F | |
Contextual Info: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■ |
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CY7C1386D CY7C1387D 18-Mbit CY7C1386D/CY7C1387D | |
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Contextual Info: CY7C1386DV25 CY7C1387DV25 PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 167 MHz • Registered inputs and outputs for pipelined operation |
Original |
CY7C1386DV25 CY7C1387DV25 18-Mbit 36/1M 250-MHz 200-MHz 167-MHz 119-BGA | |
Contextual Info: CY7C1386D CY7C1387D 18-Mbit 512K x 36/1 Mbit x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation |
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CY7C1386D CY7C1387D 18-Mbit 250-MHz 100-age# | |
AN1064
Abstract: CY7C1386D CY7C1386F CY7C1387D CY7C1387F
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CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F AN1064 CY7C1386D CY7C1386F CY7C1387D CY7C1387F | |
CY7C1366C
Abstract: CY7C1386DV25 CY7C1387DV25 67L125
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CY7C1386DV25 CY7C1387DV25 18-Mbit 36/1M 250-MHz 200-MHz 167-MHz CY7C1386DV25/CY7C1387DV25 CY7C1366C CY7C1386DV25 CY7C1387DV25 67L125 | |
Contextual Info: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■ |
Original |
CY7C1386D CY7C1387D 18-Mbit CY7C1386D/CY7C1387D | |
AN1064
Abstract: CY7C1386DV25 CY7C1386FV25 CY7C1387DV25 CY7C1387FV25
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CY7C1386DV25, CY7C1386FV25 CY7C1387DV25, CY7C1387FV25 18-Mbit 36/1M CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/ CY7C1387FV25 CY7C1386FV25 AN1064 CY7C1386DV25 CY7C1387DV25 | |
Contextual Info: CY7C1386DV25 CY7C1387DV25 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation |
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CY7C1386DV25 CY7C1387DV25 18-Mbit 36/1M 250-MHz 100-pin | |
Contextual Info: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■ |
Original |
CY7C1386D CY7C1387D 18-Mbit CY7C1386D/CY7C1387D | |
AN1064
Abstract: CY7C1386F CY7C1387F
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Original |
CY7C1386D/CY7C1386F CY7C1387D/CY7C1387F 18-Mbit CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F 36/1M AN1064 CY7C1386F CY7C1387F | |
schematic diagram atx Power supply 500w
Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
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P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS |