CY7C1393KV18 Search Results
CY7C1393KV18 Price and Stock
Rochester Electronics LLC CY7C1393KV18-300BZXCIC SRAM 18MBIT PARALLEL 165FBGA |
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CY7C1393KV18-300BZXC | Bulk | 3,520 | 11 |
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Rochester Electronics LLC CY7C1393KV18-250BZIIC SRAM 18MBIT PAR 165FBGA |
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CY7C1393KV18-250BZI | Bulk | 274 | 13 |
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Rochester Electronics LLC CY7C1393KV18-333BZIIC SRAM 18MBIT PARALLEL 165FBGA |
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CY7C1393KV18-333BZI | Bulk | 172 | 10 |
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Infineon Technologies AG CY7C1393KV18-250BZIIC SRAM 18MBIT PAR 165FBGA |
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CY7C1393KV18-250BZI | Tray |
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Infineon Technologies AG CY7C1393KV18-333BZIIC SRAM 18MBIT PARALLEL 165FBGA |
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CY7C1393KV18-333BZI | Tray |
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CY7C1393KV18-333BZI | Tray | 111 Weeks | 680 |
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CY7C1393KV18 Datasheets (3)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
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CY7C1393KV18-250BZI |
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Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 250MHZ 165FBGA | Original | |||
CY7C1393KV18-300BZXC |
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Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 300MHZ 165FBGA | Original | |||
CY7C1393KV18-333BZI |
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Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 333MHZ 165FBGA | Original |
CY7C1393KV18 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: CY7C1392KV18 CY7C1393KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features Configurations • 18-Mbit density 2 M x 8, 1 M × 18 CY7C1392KV18 – 2 M × 8 ■ 333-MHz clock for high bandwidth |
Original |
CY7C1392KV18 CY7C1393KV18 18-Mbit 333-MHz | |
Contextual Info: CY7C1392KV18 CY7C1393KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features Configurations • 18-Mbit density 2 M x 8, 1 M × 18 CY7C1392KV18 – 2 M × 8 ■ 333-MHz clock for high bandwidth |
Original |
CY7C1392KV18 CY7C1393KV18 18-Mbit CY7C1392KV18 333-MHz | |
Contextual Info: CY7C1392KV18 CY7C1393KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features Configurations • 18-Mbit density 2 M x 8, 1 M × 18 CY7C1392KV18 – 2 M × 8 ■ 333-MHz clock for high bandwidth |
Original |
CY7C1392KV18 CY7C1393KV18 18-Mbit CY7C1392KV18 333-MHz | |
Contextual Info: CY7C1392KV18, CY7C1992KV18 CY7C1393KV18, CY7C1394KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features Functional Description • 18 Mbit density 2 M x 8, 2 M x 9, 1 M x 18, 512 K x 36 ■ 333-MHz clock for high bandwidth ■ Two-word burst for reducing address bus frequency |
Original |
CY7C1392KV18, CY7C1992KV18 CY7C1393KV18, CY7C1394KV18 18-Mbit 333-MHz | |
Contextual Info: CY7C1392KV18, CY7C1992KV18 CY7C1393KV18, CY7C1394KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features Functional Description • 18 Mbit density 2 M x 8, 2 M x 9, 1 M x 18, 512 K x 36 ■ 333-MHz clock for high bandwidth ■ Two-word burst for reducing address bus frequency |
Original |
CY7C1392KV18, CY7C1992KV18 CY7C1393KV18, CY7C1394KV18 18-Mbit CY7C1992KV18, CY7C1394KV18 | |
Contextual Info: CY7C1392KV18 CY7C1393KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features Configurations • 18-Mbit density 2 M x 8, 1 M × 18 CY7C1392KV18 – 2 M × 8 ■ 333-MHz clock for high bandwidth |
Original |
CY7C1392KV18 CY7C1393KV18 18-Mbit 333-MHz |