CY7C14101KV18 Search Results

Contextual Info: CY7C14101KV18, CY7C14251KV18 CY7C14121KV18, CY7C14141KV18 36-Mbit QDR Features II SRAM 2-Word Burst Architecture Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions CY7C14101KV18 – 4M x 8 ■ 333 MHz Clock for High Bandwidth