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    CY7C1424AV18 Search Results

    CY7C1424AV18 Datasheets (4)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    CY7C1424AV18
    Cypress Semiconductor 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Original PDF 252.11KB 23
    CY7C1424AV18-167BZXC
    Cypress Semiconductor 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Original PDF 252.11KB 23
    CY7C1424AV18-250BZC
    Cypress Semiconductor 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture; Architecture: DDR-II SIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V Original PDF 440.66KB 31
    CY7C1424AV18-250BZCT
    Cypress Semiconductor 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture; Architecture: DDR-II SIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V Original PDF 440.66KB 31
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    CY7C1424AV18 Price and Stock

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    Infineon Technologies AG CY7C1424AV18-250BZC

    IC SRAM 36MBIT PAR 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1424AV18-250BZC Tray 105
    • 1 -
    • 10 -
    • 100 -
    • 1000 $45.08
    • 10000 $45.08
    Buy Now

    Rochester Electronics LLC CY7C1424AV18-250BZC

    IC SRAM 36MBIT PAR 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1424AV18-250BZC Tray 5
    • 1 -
    • 10 $63.54
    • 100 $63.54
    • 1000 $63.54
    • 10000 $63.54
    Buy Now

    Infineon Technologies AG CY7C1424AV18-250BZCT

    IC SRAM 36MBIT PAR 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1424AV18-250BZCT Reel 1,000
    • 1 -
    • 10 -
    • 100 -
    • 1000 $40.77
    • 10000 $40.77
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    Cypress Semiconductor CY7C1424AV18-250BZC

    SRAM Chip Sync Dual 1.8V 36M-bit 1M x 36 0.45ns 165-Pin FBGA Tray
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Verical () CY7C1424AV18-250BZC 407 25
    • 1 -
    • 10 -
    • 100 $72.56
    • 1000 $64.92
    • 10000 $61.11
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    CY7C1424AV18-250BZC 100 25
    • 1 -
    • 10 -
    • 100 $72.56
    • 1000 $64.92
    • 10000 $61.11
    Buy Now
    Rochester Electronics CY7C1424AV18-250BZC 507 1
    • 1 -
    • 10 -
    • 100 $58.05
    • 1000 $51.94
    • 10000 $48.88
    Buy Now

    CY7C1424AV18 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    CY7C1422AV18

    Abstract: CY7C1423AV18 CY7C1424AV18 CY7C1429AV18
    Contextual Info: CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 ■ 300 MHz clock for high bandwidth ■ 2-word burst for reducing address bus frequency


    Original
    CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 CY7C1429AV18 PDF

    Contextual Info: CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency


    Original
    CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit 300-MHz PDF

    Contextual Info: CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M × 9, 2M × 18, 1M × 36 ■ 300 MHz clock for high bandwidth


    Original
    CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit CY7C1429AV18, CY7C1424AV18 PDF

    Contextual Info: CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 PRELIMINARY 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency


    Original
    CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit 300-MHz 600MHz) CY7C1429AV18 PDF

    Contextual Info: CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M × 9, 2M × 18, 1M × 36 ■ 300 MHz clock for high bandwidth


    Original
    CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit CY7C1429AV18, CY7C1424AV18 PDF

    CY7C1422AV18

    Abstract: CY7C1423AV18 CY7C1424AV18 CY7C1429AV18 CY7C1423V18 FBGA PACKAGE thermal resistance
    Contextual Info: CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency


    Original
    CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit 300-MHz CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 CY7C1429AV18 CY7C1423V18 FBGA PACKAGE thermal resistance PDF

    CY7C1422AV18

    Abstract: CY7C1423AV18 CY7C1424AV18 CY7C1429AV18
    Contextual Info: CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 PRELIMINARY 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 250-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency


    Original
    CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit 250-MHz CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 CY7C1429AV18 PDF

    Contextual Info: CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency


    Original
    CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit 300-MHz PDF

    Contextual Info: CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 ■ 300 MHz clock for high bandwidth ■ 2-word burst for reducing address bus frequency


    Original
    CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit CY7C1429AV18, CY7C1424AV18 PDF

    CY7C1422AV18

    Abstract: CY7C1423AV18 CY7C1424AV18 CY7C1429AV18 AN5062 330x8 MAX9275
    Contextual Info: CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 ■ 300 MHz clock for high bandwidth ■ 2-word burst for reducing address bus frequency


    Original
    CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 CY7C1429AV18 AN5062 330x8 MAX9275 PDF

    CY7C1338-100AXC

    Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
    Contextual Info: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12


    Original
    CY7C1019BV33-15VC GS71108AJ-12 CY7C1019BV33-15VXC GS71108AGJ-12 CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12 CY7C1019CV33-10VC GS71108AJ-10 CY7C1338-100AXC gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC PDF