DD154 Search Results

5088A

Abstract: DIP32 LC372100PP SOP32 en-5088
Contextual Info: ¡Ordering number : EN%5088A^ CMOS LSI No. 5088A LC3721OOPP, PM-10/LC3721OOPP, PM-20LV 2 MEG 262144 words x 8 bits Mask ROM internal Clocked Silicon Gate Preliminary Overview The LC372100PP, PM-10 and LC372100PP, PM-20LV are 2097152-bit Mask Programmable Read Only

DG417CJ

Contextual Info: 7907 74; Rev 2; 72/96 > V I> JX I> k l Improved, SPST/SPDT Analog Sw itches General D escription New Features Maxim's redesigned DG417/DG418/DG419 precision, CMOS, monolithic analog switches now feature guar­ anteed on-resistance matching 3i2 max between

Contextual Info: DS2154 PRELIMINARY DALLAS SEMICONDUCTOR DS2154 Enhanced E1 Single Chip Transceiver PACKAGE OUTLINE FEATURES • Complete E1 CEPT PCM-30/ISDN-PRI transceiver functionality • Onboard long and short haul line interface for clock/ data recovery and waveshaping

Contextual Info: CY7C451 CY7C453 m r cypress Functional Description Features • 512 x 9 CY7C451 and 2,048 x 9 (CY7C453) FIFO buffer memory • Expandable in width and depth • High-speed 70-MHz standalone; 50-MHz cascaded • Supports free-running 50% duly cycle clock inputs

Contextual Info: 4Ö554S5 G ü i s m a 3fl7 International Ss*] Rectifier INR PD-9.862 IRFL214 INTERNATIONAL RECTIFIER bSE D HEXFET Power MOSFET Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Repetitive Avalanche Rated Fast Switching Ease of Paralleling Simple Drive Requirements

Contextual Info: Panasonic For Information Equipment MN5515 High-Speed Color Conversion LSI • Overview The MN5515 is a high-speed color conversion processor capable of free conversion among various full-color formats. It offers a low-cost solution to reproducing colors from

54B4

Abstract: 2sa 1023 CY7C451 CY7C453 PIN CONFIGURATION BF 494 DLS4
Contextual Info: n r CYPRESS • • • • • • • • • • • • • 512 x 9 Cascadable Clocked and 2K x 9 Cascadable Clocked FIFOs with Programmable Flags Functional Description Features • CY7C451 CY7C453 512 x 9 CY7C4S1 an d 2,048 x 9 (CY7C453) FIFO buffer m em ory

Tuner ADR SCL SDA

Abstract: TV tuner IC Divider 23XT
Contextual Info: T e m ic U6209B-FFP TELEFUNKEN Semiconductors Frequency Synthesizer for TV Tuner Features • 1.3 GHz divide-by-8 prescaler integrated can be bypassed • 15 bit counter accepts input frequencies up to 170 MHz • Prqgramable reference divider: divide by 512 or 1024

MAX4333

Contextual Info: 19-1192;Rev0:2/97 y k i y i x o k i Single/Dual/Quad, Low-Power, Single-Supply, Rail-to-Rail I/O Op Am ps with Shutdown D escription The MAX4330-MAX4334 single/dual/quad op amps combine a wide 3MHz bandwidth, low-power operation, and excellent DC accuracy with Rail-to-RaO inputs and

MAX531ACPD

Contextual Info: 19-0172; Rev 6; 2/97 > k i y j x i > k i +5Vr Low-Power, Voltage-Output, Serial 12-Bit DACs The MAX538's buffer is fixed at a gain of +1 and the MAX539's buffer at a gain of +2. The MAX531's internal op amp may be configured for a gain of +1 or +2, as well as for unipolar or bipolar output voltages. The

Contextual Info: SSI 32P4903A ¿ ilk o n s y s te m PRML Read Channel with PR4, 8/9 ENDEC, 4-burst Servo s A TDK Group/Company Advance Information March 1996 AUTOMATIC GAIN CONTROL DESCRIPTION Dual mode AGC, analog during acquisition, sampled during data reads The SSI 32P4903A is a high performance BiCMOS

Contextual Info: Integrated Device Technology, Inc. FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • 0 .5 M IC R O N C M O S T e c h n o lo g y T yp ica l tsk o (O u tput S kew ) < 2 5 0 p s , clo cke d m o de L o w in p u t an d o u tp u t leaka ge <1 (iA (m ax)

NIA4M

Abstract: km44c256cp-7 km44c256cj-6 km44c256cj-7 KM44C256CP7 km44c256cp-8 km44c256cz-7 km44c256cp KM44C256CZ-6 KM44C256CP-6
Contextual Info: SAMSUNG ELECTRONICS INC b?E » WË 7^4142 KM44C256C DG154bO b4b SH6K CMOS DRAM 256Kx4 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Perform ance rang«: The Samsung KM44C256C is a CMOS high speed 262,144x4 Dynamic Random Access Memory. Its design

3 DG 1008

Abstract: MRF 530 PEWI CY7C451 CY7C453
Contextual Info: n r CYPRESS • • • • • • • • • • • • • 512 x 9 Cascadable Clocked and 2K x 9 Cascadable Clocked FIFOs with Programmable Flags Functional D escription Features • CY7C451 CY7C453 512 x 9 CY7C4S1 an d 2,048 x 9 (CY7C453) FIFO buffer m em ory

Contextual Info: SAMSUNG ELECTRONICS INC L7E D TTbMma KM41C1000CL 00153=17 ÔS7 CMOS DRAM 1Mx1 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KM41C1000CL is a CMOS high speed 1,048,576x1 Dynamic Random Access Memory. Its

Contextual Info: ADVANCE MT28SF400 M T285F400 256K x 16, 512K x 8 FLASH MEMORY M IC R Q IM I FLASH MEMORY 256Kx16, 512Kx8 S m a rtV o lta g e , FEATURES PIN ASSIGNMENT Top View 44-Pin SOP (FA-1) • Seven erase blocks: 16KB/8K-word boot block (protected) Two 8KB/4K-word parameter blocks

u 6204

Abstract: Frequency Synthesizer for TV Tuner u 6204 srf 20 ao u 6358 U6358B m1124
Contextual Info: U6214B-AFP TELEFUNKEN Semiconductors Frequency Synthesizer for TV Tuner with UNIVERSAL BUS FEATURES • 1.3 GHz divide-by-8 prescaler integrated can be bridged • UNIVERSAL BUS: • PC - Bus Mode: • 3 - Wire Bus P C -B u s or 3 - wire - Bus PC - Bus software compatible to U 6204 B

Z101

Contextual Info: Ordering num ber: ENJs?4541A CMOS LSI No. LC331632M-70/80/10/12, ML-70/80/10 4541A SAW O 512 K 32768 words x 16 bits Pseudo-SRAM Preliminary Overview Package Dimensions The LC331632 series is composed of pseudo static RAM th a t o p erate on a sin g le 5 V p o w er supply and are

Contextual Info: 19-1162;Rev0; 12/96 w i y i x i > k i Low- Voltage, CMOS Analog Multiplexers/Switches with Enable Inputs and Address Latching Features ♦ Pin Compatible with 74HC4351174HC4352/74HC4353 The MAX4530/MAX4531/MAX4532 operate from a sin­ gle supply of +2V to +12V, or from dual supplies of

SN54ABT2952A

Abstract: SN74ABT2952A
Contextual Info: SN54ABT2952A, SN74ABT2952A OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCBS203A-AUG UST1992-REVISEDJULY 1994 State-of-the-Art EPIC-llB BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds

Contextual Info: SA M S UN G E L E C T R O N I C S INC b4E D • T T b M l M S 0 0 1 S 4 3 D 137 « S r i G K IRFSZ44/45 IRFSZ40/42 N-CHANNEL POWER MOSFETS FEATURES • • • • • • • Lower R ds <o n > Improved inductive ruggedness Fast switching times Rugged polysilicon gate cell structure

Contextual Info: SAMSUNG ELECTRONICS INC 7Tb4142 0015445 33T • SNGK b7E D CMOS DRAM KM41C1002C 1,048,576x 1 Bit CMOS Dynamic RAM with Static Column Mode FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KM41C1002C is a CMOS high speed 1,048,576 x 1 Dynamic Random Access Memory. Its de­

Contextual Info: Diode, switching, leaded 15 5 131 1 5 5 132 15 5 133 These diodes are in a glass sealed envelope and are suitable for lead mounting on printed circuit boards. They have a high switching speed. The reverse recovery time (trr is typically 1.5 ns.) Dimensions (Units : mm)

Contextual Info: ISS'x FAST CMOS 20-BIT TRANSPARENT LATCHES IDT54/74FCT16841AT/BT/CT/ET IDT54/74FCT162841 AT/BT/CT/ET Integrated Device Technology, Inc. DESCRIPTION: FEA TU R E S: • Common features: - 0.5 MICRON CMOS Technology - High-speed, low-power CMOS replacement for