50hz notch filter ic
Abstract: MX7705EWE ana 608 band reject notch filter MX7705 date code spi 6N136 AD7705 AIN210 MX7705 MX7705EPE
Text: 19-3051; Rev 3; 6/09 16-Bit, Low-Power, 2-Channel, Sigma-Delta ADC Features The MX7705 low-power, 2-channel, serial-output analog-to-digital converter ADC includes a sigma-delta modulator with a digital filter to achieve 16-bit resolution with no missing codes. This ADC is pin compatible and
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16-Bit,
MX7705
16-bit
AD7705.
MX7705
50hz notch filter ic
MX7705EWE
ana 608
band reject notch filter
MX7705 date code spi
6N136
AD7705
AIN210
MX7705EPE
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MX7705EWE
Abstract: ana 608 AD7705 AIN210 MX7705 MX7705EPE MX7705EUE
Text: 19-3051; Rev 2; 12/05 16-Bit, Low-Power, 2-Channel, Sigma-Delta ADC Features The MX7705 low-power, 2-channel, serial-output analog-to-digital converter ADC includes a sigma-delta modulator with a digital filter to achieve 16-bit resolution with no missing codes. This ADC is pin compatible and
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16-Bit,
MX7705
16-bit
AD7705.
MX7705
MX7705EWE
ana 608
AD7705
AIN210
MX7705EPE
MX7705EUE
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RFPP
Abstract: No abstract text available
Text: ICs for Communications Interworking Element IWE8 PXB 4220 Version 2.0 Preliminary Delta Sheet 07.97 T4220-XV20-L1-7600 PXB 4220 Revision History: Current Version: 07.97 Previous Version: Preliminary Data Sheet 11.96 Page in previous Version Page (in new
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T4220-XV20-L1-7600
0000H
RFPP
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50hz notch filter ic
Abstract: 50hz notch filter AD7705 MAX1415 MAX1415ENE MAX1415EUE MAX1415EWE MAX1416 4828 pdip
Text: 19-3163; Rev 1; 12/05 KIT ATION EVALU E L B AVAILA 16-Bit, Low-Power, 2-Channel, Sigma-Delta ADCs Features The MAX1415/MAX1416 low-power, 2-channel, serialoutput analog-to-digital converters ADCs use a sigmadelta modulator with a digital filter to achieve 16-bit
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16-Bit,
MAX1415/MAX1416
16-bit
MX7705/AD7705.
4576MHz)
MAX1415
MAX1416
MAX1415/MAX1416
50hz notch filter ic
50hz notch filter
AD7705
MAX1415ENE
MAX1415EUE
MAX1415EWE
4828 pdip
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Untitled
Abstract: No abstract text available
Text: 19-3163; Rev 1; 12/05 KIT ATION EVALU E L B AVAILA 16-Bit, Low-Power, 2-Channel, Sigma-Delta ADCs Features The MAX1415/MAX1416 low-power, 2-channel, serialoutput analog-to-digital converters ADCs use a sigmadelta modulator with a digital filter to achieve 16-bit
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16-Bit,
MAX1415/MAX1416
16-bit
MX7705/AD7705.
4576MHz)
MAX1415
MAX1416
MAX1415/MAX1416
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MAX1416
Abstract: 30242
Text: 19-3163; Rev 1; 12/05 KIT ATION EVALU E L B AVAILA 16-Bit, Low-Power, 2-Channel, Sigma-Delta ADCs Features The MAX1415/MAX1416 low-power, 2-channel, serialoutput analog-to-digital converters ADCs use a sigmadelta modulator with a digital filter to achieve 16-bit
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16-Bit,
16-Bit
4576MHz
MAX1415)
MAX1416)
MX7705/AD7705
16-Pin
MAX1415/MAX1416
MAX1415/MAX1416
MAX1416
30242
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DS26F32MW-MLS
Abstract: DS26F31 DS26F32 DS26F32MJ-QMLV DS26F32MW-QMLV M632 RS-423
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 08/24/98 Last Update Date: 10/05/98 Last Major Revision Date: MNDS26F32M-X REV 0B0 QUAD DIFFERENTIAL LINE RECEIVERS General Description The DS26F32 is a quad differential line receiver designed to meet the requirements of EIA
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MNDS26F32M-X
DS26F32
RS-422
RS-423,
200mV
E20ARE
J16ARL
DS26F32MW-MLS
DS26F31
DS26F32MJ-QMLV
DS26F32MW-QMLV
M632
RS-423
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5962-7802005MFA
Abstract: 5962-7802005MZA M632 DS26F31 DS26F32 DS26F32MER-QML DS26F32MJ-QMLV MNDS26F32M-X-RH RS-423 w87c
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 05/20/99 Last Update Date: 05/04/01 Last Major Revision Date: MNDS26F32M-X-RH REV 0C0 QUAD DIFFERENTIAL LINE RECEIVERS ALSO AVAILABLE GUARANTEED TO 100K RAD Si TESTED TO MIL-STD-883, METHOD 1019.5, CONDITION A
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MNDS26F32M-X-RH
MIL-STD-883,
DS26F32
RS-422
RS-423,
M0003443
MNDS26F32M-X-RH,
MNDS26F32M-X,
5962-7802005MFA
5962-7802005MZA
M632
DS26F31
DS26F32MER-QML
DS26F32MJ-QMLV
RS-423
w87c
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DS26F32MJFQMLV
Abstract: 5962-7802005MFA DS26F31 DS26F32 DS26F32MEF-QML DS26F32MJ-QMLV MNDS26F32M-X-RH RS-423 DS26F32MWFQMLV 5962F7802005VFA
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 05/20/99 Last Update Date: 05/27/99 Last Major Revision Date: MNDS26F32M-X-RH REV 0A0 QUAD DIFFERENTIAL LINE RECEIVERS ALSO AVAILABLE GUARANTEED TO 300K RAD Si TESTED TO MIL-STD-883, METHOD 1019.5, CONDITION A
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MNDS26F32M-X-RH
MIL-STD-883,
DS26F32
RS-422
RS-423,
E20ARE
J16ARL
DS26F32MJFQMLV
5962-7802005MFA
DS26F31
DS26F32MEF-QML
DS26F32MJ-QMLV
RS-423
DS26F32MWFQMLV
5962F7802005VFA
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5962-7802005MFA
Abstract: DS26F31 DS26F32 DS26F32MER-QML DS26F32MJ-QMLV MNDS26F32M-X-RH RS-423
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 05/20/99 Last Update Date: 08/22/00 Last Major Revision Date: MNDS26F32M-X-RH REV 0B0 QUAD DIFFERENTIAL LINE RECEIVERS ALSO AVAILABLE GUARANTEED TO 100K RAD Si TESTED TO MIL-STD-883, METHOD 1019.5, CONDITION A
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MNDS26F32M-X-RH
MIL-STD-883,
DS26F32
RS-422
RS-423,
J16ARL
W16ARL
M0003443
5962-7802005MFA
DS26F31
DS26F32MER-QML
DS26F32MJ-QMLV
RS-423
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Untitled
Abstract: No abstract text available
Text: TM VTXP-48 Device 2.5 Gbps Virtual tributary Processor with Integrated 40 Gbps VT/STS & VC/AU3 Switch TXC-06960 DATA SHEET PRODUCT PREVIEW TXC-06960-MB, Ed. 1 October 2004 FEATURES APPLICATIONS • Line interface - Dual nibble wide clock and data LVDS 622.02 Mbit/s
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VTXP-48
TXC-06960
TXC-06960-MB,
4-Xc/VC-4-16c/STS1/STS-3c/STS-12c/STS-48c
TU-11/TU-12/VT1
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NT1127
Abstract: E14112 E511 0x05D3 book national semiconductor GR-1230
Text: PHAST-48V Device STM-16/OC-48 SDH/SONET Overhead Terminator and Virtual Tributary Pointer Processor Scalable with 45 Gbit/s VT/STS & VC/AU3 Switch TXC-06965 DATA SHEET PRELIMINARY TXC-06965-MB, Ed. 3 March 2007 FEATURES APPLICATIONS • SDH/SONET line interface
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PHAST-48V
STM-16/OC-48
TXC-06965
TXC-06965-MB,
STM-16/STS-48
STM-16/STS-48
NT1127
E14112
E511
0x05D3
book national semiconductor
GR-1230
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Untitled
Abstract: No abstract text available
Text: VTXP-48 Device 2.5 Gbps Virtual tributary Processor with Integrated 45 Gbps VT/STS & VC/AU3 Switch TXC-06960 DATA SHEET PRODUCT PREVIEW TXC-06960-MB, Ed. 2 March 2006 FEATURES • Line or Client interfaces - Dual CML 2.488 Gbit/s TFI-5 compliant shared with terminal and inter-connect interfaces
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VTXP-48
TXC-06960
TXC-06960-MB,
STS-3c/STS-12c/STS-48c
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Untitled
Abstract: No abstract text available
Text: PHAST-48V Device STM-16/OC-48 SDH/SONET Overhead Terminator and Virtual Tributary Pointer Processor Scalable with 45 Gbit/s VT/STS & VC/AU3 Switch TXC-06965 DATA SHEET PRODUCT PREVIEW TXC-06965-MB, Ed. 2 March 2006 FEATURES APPLICATIONS • SDH/SONET line interface
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PHAST-48V
STM-16/OC-48
TXC-06965
TXC-06965-MB,
STM-16/STS-48
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e5027
Abstract: BYT 70 VT221 sgi01 E4110 march networks stm-5 gif11 E1110 327-o E9110
Text: VTXP-24 Device 1.25 Gbps Virtual Tributary Processor with Integrated VT/STS & VC/AU3 Switch TXC-06970 DATA SHEET PRODUCT PREVIEW TXC-06970-MB, Ed. 2 March 2006 FEATURES • Line or Client interfaces - Dual CML 2.488 Gbit/s TFI-5 compliant shared with terminal and interconnect interfaces
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VTXP-24
TXC-06970
TXC-06970-MB,
e5027
BYT 70
VT221
sgi01
E4110
march networks stm-5
gif11
E1110
327-o
E9110
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AMCC BGA 728
Abstract: is1555 0747 sdh
Text: S4802CBI12 Missouri Datasheet Revision 2.3 February 12, 2002 AMCC Dear customer, Thank you for choosing an AMCC device. We appreciate your confidence in our products. To ensure your complete satisfaction with our products and technologies, we have prepared this publication to
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S4802CBI12
S4802CBI12:
STS-48/STM-16
AMCC BGA 728
is1555
0747 sdh
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DS96F172
Abstract: DS96F172MW-MIL MNDS96F172M-W
Text: MILITARY DATA SHEET Original Creation Date: 06/19/95 Last Update Date: 10/21/96 Last Major Revision Date: 06/19/95 MNDS96F172M-W REV 1B0 RS-485 COMPARABLE QUAD DIFFERENTIAL DRIVER General Description The DS96F172 is a high speed quad differential line driver designed to meet EIA Standards
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MNDS96F172M-W
RS-485
DS96F172
RS-485.
W16ARL
DS96F172MW-MIL
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DS26F32MJ-QMLV
Abstract: delta w16A 5962-7802005MEA
Text: DS26F32M Quad Differential Line Receivers General Description Features The DS26F32 is a quad differential line receiver designed to meet the requirements of EIA Standards RS-422 and RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission.
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DS26F32MQuad
DS26F32M
DS26F32
RS-422
RS-423,
RM26F32MWF
RM26F32MWR
DS26F32MJ-QMLV
delta w16A
5962-7802005MEA
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R02 motorola 2903
Abstract: 108 046f AMCC STS-192
Text: S19201CAI12 Indus Datasheet Revision 2.5 March 10, 2003 Dear customer, Thank you for choosing an AMCC device. We appreciate your confidence in our products. To ensure your complete satisfaction with our products and technologies, we have prepared this publication to provide you additional information, which will help you use the device more efficiently. This
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S19201CAI12
S19201CAI12:
STS-192
R02 motorola 2903
108 046f
AMCC STS-192
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m632
Abstract: 26f32 5962-7802005MEA 5962-7802005MFA
Text: DS26F32M Quad Differential Line Receivers General Description Features The DS26F32 is a quad differential line receiver designed to meet the requirements of EIA Standards RS-422 and RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission.
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DS26F32MQuad
DS26F32M
DS26F32
RS-422
RS-423,
pdf\recode\DS26F32M
m632
26f32
5962-7802005MEA
5962-7802005MFA
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AMAZON
Abstract: SK 104 63,5 STS CSB 503 AU-AIS S4808PBI GR-253 S3043 S3044 S3083 S4801
Text: S4801 Amazon Device Specification Revision NC July 21, 2000 AMCC Part Number S4801 Revision NC - September 2000 AMAZON DEVICE SPECIFICATION STS-48c POS/ATM SONET MAPPER General Description Features • Processes SONET/SDH STS-48c/ STM-16/AU-416c data streams with full duplex mapping of ATM
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S4801
STS-48c
STS-48c/
STM-16/AU-416c)
S4801
0x040
AMAZON
SK 104 63,5 STS
CSB 503
AU-AIS
S4808PBI
GR-253
S3043
S3044
S3083
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5962-9076502MEA
Abstract: DS96F174 DS96F174MJ-QMLV
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 06/19/95 Last Update Date: 10/23/01 Last Major Revision Date: 06/19/95 MNDS96F174M-X REV 1B0 RS-485 COMPARABLE QUAD DIFFERENTIAL DRIVER General Description The DS96F174 is a high speed quad differential line driver designed to meet EIA Standard
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MNDS96F174M-X
RS-485
DS96F174
RS-485.
5962-9076502MEA
DS96F174MJ-QMLV
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672l
Abstract: DCC-13 TXC-06965 GR-1230
Text: PHAST -48V Device DATA SHEET PRODUCT PREVIEW DESCRIPTION FEATURES The PHAST®-48V is a highly integrated, versatile, linearly-scalable device that implements a strictly non-blocking full availability cross connect switch and framing/mapping/pointer processing from the TU11/VT1.5 level through VC4-16c/STS-48c. The PHAST-48V can be
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STM-16/OC-48
TXC-06965
STM16/STS-48
STM-16/STS-48
VC-4-16c
STS-12c
STS-48c
TXC-06965-MB,
672l
DCC-13
GR-1230
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Untitled
Abstract: No abstract text available
Text: SIEMENS ICs for Communications Interworking Element IWE8 PXB 4220 Version 2.0 Preliminary Delta Sheet 07.97 T 4 2 2 0 -X V 20-L1 -7600 PXB 4220 Revision History: Current Version: 07.97 Previous Version: Preliminary Data Sheet 11.96 Page Page Subjects major changes since last revision
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OCR Scan
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PDF
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20-L1
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