DESTINATION OF IC Search Results

60nd02

Abstract: D0798 D05103 50MHZ S2020 S2021 d2059 DAT02 DAT06 DAT04
Contextual Info: DEVICE HIPPI SPECIFICATION SOURCE/DESTINATION INTERFACE CIRCUITS HIPPI SOURCE/DESTINATION INTERFACE CIRCUITS FEATURES S2020/S2021 HIPPI Chipset • Functionally compliant with the ANSI HIPPI standard • 32-Bit data channel • Equivalent single channel rate of 800 Mbits/sec

3RG7857-1BD

Abstract: 3RG7855-1RG 3RG787-1BD 7855-2BD AlMgSi0,5 ir sensors Siemens Optical Sender ALU-2509 3rg7857 3RG7855-1R
Contextual Info: SIMATIC FS100 3RG7855-XXX MO NTAGEANLEITUNG MOUNTING INSTRUCTION Bestimmung Destination Diese Anleitung beschreibt die Montage und den Aus- These instruction describes mounting and the substitution tausch von Einzelkomponenten der SIMATIC FS100 of single components of the SIMATIC FS100 safety

VAA33

Abstract: AA36 ZSF200
Contextual Info: Switch Fabric Data Sheet 89TSF552 Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.

TU700

Contextual Info: Products for Video Equipment Tuners for TV/VCR/CATV TV Tuner TU700 Series for color TV and VCR •T U 7 0 0 Series Specification of each destination of PAL, JPN and USA are available. Point of input terminal and arrangement of pin for tuner are based on the industry standard.

Contextual Info: 89TSF552 Switch Fabric Data Sheet Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.

VAA33

Abstract: cos v21 l10 aw26
Contextual Info: Switch Fabric Data Sheet 89TSF552 Preliminary Information* Description is configurable up to OC-192. Always non-blocking architecture across destination, traffic type cell, packet , and class of service (CoS). ◆ Supports up to 4 egress subports per switch port.

001C

Abstract: 68B4
Contextual Info: APPLICATION NOTE H8/300L Super Low Power Series Block Transfer 2: Example Usage of the EEPMOV Instruction MOVE2 Introduction The software MOVE2 moves a block of data from one data memory area to another. Data can be moved even where the source data memory area overlaps the destination data memory area. This is an example of the application software

z0841004

Abstract: z80 dma Z84C1006 z8410 z84c10
Contextual Info: Z8410/Z84C10 NMOS/CMOS Z80 DMA Direct Memory Access Controller FEATURES • Transfers, searches, and search/transfers in Byte-at-aTime, Burst, or Continuous modes. Cycle length and edge timing can be programmed to match the speed of any port. ■ Dual port addresses source and destination generated

coin slot

Abstract: "magnetic tape"
Contextual Info: Advanced Micro Devices AN-149 First-In First-Out Memories: Operations and Applications Zwie Amitai and Nusra Lodhi In many digital systems, high-speed transfers of data or instruc­ tions take place between sources and destinations that have different data rates. In other cases, the source and destination

Contextual Info: ASR-Soft Installation Installation on Windows Vista and Windows 7: 1 Insert the ASR-soft CD into the CD-ROM drive of your computer/laptop. The 2 When prompted for the destination directory as shown below, user can either installation wizard starts automatically and a Welcome screen appears, as

Contextual Info: CL-GD7541/GD7543 Super V G A L C D Controller CIRRUS LOGIC Appendix A BitBLT Engine A.1 Introduction BitBLT bit block transfer is an operation in which one area (source area) of display memory or system memory is copied to another area (destination area) of display memory or system memory.

gr2c

Abstract: gr26
Contextual Info: CL-GD7548 XGA/SVGA LCD Controller ÌCIRRUS LOGIC Appendix A BitBLT Engine A.1 In tr o d u c tio n BitBLT bit block transfer is an operation in which one area (source area) of display mem ory or system memory is copied to another area (destination area) of display memory or system memory.

MELPS-740

Contextual Info: MITSUBISHI MICROCOMPUTERS SERIES M ELPS 740 ADDRESSING MODES SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER ADDRESSING MODES contents or a com bination of both should be used to specify T h e series M E L P S 740 has 17 addressing m odes and an the m em ory or jum p destination. B ased on these 3 m ethods,

GTO Driver

Abstract: weak current AN10138
Contextual Info: National Semiconductor Application Note 1173 Milt Schwartz September 2000 INTRODUCTION The high data rates in today’s systems require extremely low skew clock distribution at a destination on a backplane logic card. Many systems also require a local clock to be distributed across a backplane. Therefore, creating a local distribution of clock signals with low-skew as well as providing a

010B

Abstract: AN605 DS80C310 DS80C390 DS80C400 DS87C550 DS89C420 010C DPS DPTR DALLAS DS80C320
Contextual Info: Application Note 605 Data Pointer Decrement Feature Simplifies Copy Operation for Overlapping Memory Buffers www.maxim-ic.com OVERVIEW One of the essential operations of any microcontroller is the ability to store and retrieve data to/from memory. The MOVX operation provides one facility for doing this on the 8051 architecture.

44-PIN

Abstract: QS761480 QS762470 CR31-CR16 R043F 01B7H
Contextual Info: High-Speed CM OS 1K x 64, 2K x 64 Content-Addressable Memory QCAM1• Q u a l it y Associative Processor S e m ic o n d u c t o r , I n c , QS761480 QS762470 ADVANCE INFORMATION FEATURES DESCRIPTION • • • • The QS761480 and QS762470 is a family of 1 K and

Contextual Info: High-Speed CMOS 1 k x 64, 2k x 64 Content-Addressable Memory QCAM Q u a l it y Associative Processor S e m ic o n d u c t o r , I n c QS761480 QS762470 FEATURES DESCRIPTION • • • • The QS761480 and QS762470 is a family of 1k and 2k x 64-bit CAMs (content-addressable memories).

0309H

Contextual Info: Q u a l it y S e m ic o n d u c t o r , I n c High-Speed CMOS 1 k x 64, 2k x 64 Content-Addressable Memory QCAM Associative Processor . QS761480 QS762470 FEATURES DESCRIPTION • • • • The QS761480 and QS762470 is a family of 1k and 2k x 64-bit CAMs (content-addressable memories).

DS34S132

Abstract: 0x85E APP4785 RTP port range destination of ic
Contextual Info: Maxim > App Notes > Communications circuits T/E carrier and packetized Keywords: interoperability, DS34S132, TDM, TDM over packet, TDMoP, TDMoIP, SAToP, CESoP Aug 31, 2010 APPLICATION NOTE 4785 How to make the DS34S132 TDM-over-Packet TDMoP IC interoperable with other vendors' TDMoP devices

1523AN4

Abstract: ics1523
Contextual Info: Integrated Circuit Systems, Inc. Document Type: ICS1523 Application Note Document Stage: Release Designing a Custom PECL Interface for the ICS1523 1. Introduction This application note explains how to specify the pseudo emitter-coupled logic PECL interface when

CY7C9116-35DC

Abstract: A2ND CY7C9116 CY7C9116-45DC CY7C517 CP4043 CP-59 CY7C9116-65DC DA1215 7C9115
Contextual Info: CY7C9115 CY7C9116/CY7C9X17 ¡s ZÆ , S jS W J ^ y p p p q c ; — •- - CMOS 16-Bit Microprogrammed ALU SEMICONDUCTOR Features • Fast — 35-ns worst-case propagation delay, Ito Y • Low power CMOS — Ice (max. at 10 MHz = 145 mA (commercial) — Icc (max. static) = 6 8 mA

inverter sla 1003

Abstract: sla 1003 MCD506 I2C-bus specification 3 2015 static ram microcontroller application PIR CONTROLLER sda 2023 P90CE201 P90CE201AEB MCD512
Contextual Info: INTEGRATED CIRCUITS DATA SHEET P90CE201 16-bit microcontroller Product specification File under Integrated Circuits, IC21 August 1993 Philips Semiconductors Product specification 16-bit microcontroller P90CE201 CONTENTS 1 FEATURES 10 8-BIT GENERAL PORT 2 GENERAL DESCRIPTION

Contextual Info: ß S e m ic o n d u c to r, In c . High-Speed 3.3V CMOS qs74lcx2hsoi 9-Bit x 4 Ports Multiple Bus Exchange INF0ARDMVAA^ With BUS Hold, Output ReSIStOr and Synchronous/Asynchronous Controls FEATURES/BENEFITS DESCRIPTION • 5V-tolerant inputs and outputs • 25Q series resistor for low switching noise

Contextual Info: Quality S e m ico n d u cto r,In c QuickSwitch Products QS3B491 High-Speed C M O S qs 3 b249i Clocked 4 Port xA 9-Bit 9 DIL wlUl/KCU 4 r u i l advance INFORMATION CrossbarSwitch FEATURES/BENEFITS DESCRIPTION • The QS3B491 and QS3B2491 are high speed