DK 52 TRANSISTOR Search Results
DK 52 TRANSISTOR Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| 2SC6026MFV | Toshiba Electronic Devices & Storage Corporation | NPN Bipolar Transistor / VCEO=50 V / IC=0.15 A / hFE=120~400 / VCE(sat)=0.25 V / SOT-723 | Datasheet | ||
| TTC5886A | Toshiba Electronic Devices & Storage Corporation | NPN Bipolar Transistor / VCEO=50 V / IC=5 A / hFE=400~1000 / VCE(sat)=0.22 V / tf=120 ns / New PW-Mold | Datasheet | ||
| TTA2097 | Toshiba Electronic Devices & Storage Corporation | PNP Bipolar Transistor / VCEO=-50 V / IC=-5 A / hFE=200~500 / VCE(sat)=-0.27 V / tf=60 ns / New PW-Mold | Datasheet | ||
| TTA011 | Toshiba Electronic Devices & Storage Corporation | PNP Bipolar Transistor / VCEO=-50 V / IC=-5 A / hFE=200~500 / VCE(sat)=-0.27 V / tf=60 ns / PW-Mini | Datasheet | ||
| TPCP8513 | Toshiba Electronic Devices & Storage Corporation | NPN Bipolar Transistor / VCEO=80 V / IC=4 A / hFE=100~200 / VCE(sat)=0.17 V / tf=70 ns / PS-8 | Datasheet |
DK 52 TRANSISTOR Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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TC518512
Abstract: transistor dk qq
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OCR Scan |
tc518512piyfiyfn/nil-70d-182tc518512pl/fl/ftl/trl-70d-183+2 | |
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Contextual Info: Datasheet PD48288109A μPD48288118A R10DS0098EJ0200 Rev.2.00 May 10, 2012 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288109A is a 33,554,432-word by 9 bit and the μPD48288118A is a 16,777,216-word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48288109apd48288118a288m-bit432-word+2 | |
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Contextual Info: Datasheet PD48288109A μPD48288118A R10DS0098EJ0300 Rev.3.00 Oct 01, 2012 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288109A is a 33,554,432-word by 9 bit and the μPD48288118A is a 16,777,216-word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48288109apd48288118a288m-bit432-word+2 | |
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Contextual Info: Datasheet PD48576109 μPD48576118 R10DS0064EJ0300 Rev.3.00 Oct 01, 2012 576M-BIT Low Latency DRAM Separate I/O Description The μPD48576109 is a 67,108,864-word by 9 bit and the μPD48576118 is a 33,554,432 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48576109pd48576118576m-bit864-word+1 | |
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Contextual Info: Datasheet PD48576109 μPD48576118 R10DS0064EJ0200 Rev.2.00 May 10, 2012 576M-BIT Low Latency DRAM Separate I/O Description The μPD48576109 is a 67,108,864-word by 9 bit and the μPD48576118 is a 33,554,432 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48576109pd48576118576m-bit864-word+1 | |
tp2350
Abstract: J200 mosfet DK 51* transistor IRF950 TRIPATH TC2001 250w audio amplifier circuit diagram capacitor 4.7uF 100v crossover passive TRIPATH pin connection of j200 transistor TK2350
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rb-tk2350-1rb-tk2350-2rb-tk2350tk2350+11 | |
TP2350B
Abstract: J200 mosfet tp2350 TRIPATH TC2001 TK2350 2 speakers 1 crossover amplifier pcb RB-TK2350-2 MURS120T Tripath Amplifier Tripath Technology
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rb-tk2350-1rb-tk2350-2rb-tk2350tk2350+11 | |
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Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT PD48288118 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288118 is a 16,777,216 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48288118288m-bit | |
p144f
Abstract: TDK EF25 BAP36 PD482
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pd48288118-a288m-bitm8e0904ep144f+3 | |
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Contextual Info: Datasheet PD48288118-A 288M-BIT Low Latency DRAM Separate I/O R10DS0157EJ0100 Rev.1.00 Feb 01, 2013 Description The μPD48288118-A is a 16,777,216 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48288118-a288m-bitr10ds0157ej0100 | |
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Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT PD48288118 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288118 is a 16,777,216 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48288118288m-bit | |
PD48576109,Contextual Info: Datasheet PD48576109 μPD48576118 R10DS0064EJ0100 Rev.1.00 September 27, 2011 576M-BIT Low Latency DRAM Separate I/O Description The μPD48576109 is a 67,108,864-word by 9 bit and the μPD48576118 is a 33,554,432 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48576109pd48576118576m-bit864-word+1 | |
BA2rcContextual Info: DATA SHEET MOS INTEGRATED CIRCUIT PD48288118 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288118 is a 16,777,216 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48288118288m-bitba2rc | |
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Contextual Info: Preliminary Datasheet PD48288109A μPD48288118A R10DS0098EJ0001 Rev.0.01 August 2, 2011 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288109A is a 33,554,432-word by 9 bit and the μPD48288118A is a 16,777,216-word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. |
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pd48288109apd48288118ar10ds0098ej0001288m-bit+2 | |
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BA1 K11
Abstract: ba1d1a PD48576118FF-E24-DW1-A
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pd48576109-apd48576118-ar10ds0064ej0001864-word+3 | |
ks 213 b
Abstract: AMD fm2 Pin Package IC818 LCD 1620 uPD1723 LCD KS 108 PD1723GF-013 LCD 1620 datasheet LCD display 1602 car radio 14x20
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pd1723gf-013pd1723gf-21364-pinks 213 b+8 | |
NEC car radio 4.5-Mhz
Abstract: LCO17 SP MZ8 transistor dk 50 NEC PD6121 diodo 72 DIODO LED Hoshiden LED display for radio pd7225
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OCR Scan |
pd17012gf-011nec car radio 4.5-mhzlco17sp mz8+7 | |
LCD12
Abstract: Car FM tuner car radio 14x20 NEC car radio 4.5-Mhz PD1723GF-013 LCD15 Tuner UPD1723GF 10.7 MHZ
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lcd12car fm tunercar radio 14x20nec car radio 4.5-mhz+5 | |
LZ9FC22
Abstract: schematic diagram tv sharp ADS7486 S1L50282F23K100 sharp lcd panel pinout transistor D400 SERVICE MANUAL tv sharp sharp lcd service manual NL2432DR22-11B tv schematic diagram SHARP power supply
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spra968omap5910lz9fc22schematic diagram tv sharp+8 | |
600S4R7BT250
Abstract: ecj2yb1h104k
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sld-1026z2700mhzerj-3ekf3240vevm-2wsx80b52+6 | |
SWITCH 255SB
Abstract: MA05-2 pin header nanoLOC TRX Transceiver user guide nanoLOC nanoLOC Development d-sub F09HP all stk ic diagram crystal 7.3728MHz zigbee based mini projects tsl2561t
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na-06-0230-0402-1switch 255sbma05-2 pin headernanoloc trx transceiver user guide+7 | |
600S2R7BT250XT
Abstract: ERT-J1VV104J transistor smd 303 IC 2030 schematic diagram 850 SMD Rework Station thermistor 100k sld1026 smd transistor r32 600L270 r5 t85
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sld-1026z2700mhzsof-26an-090+11 | |
STA-5063Z
Abstract: 5.8ghz 802.11a Amplifier land pattern for 0402 cap MMIC 5.8ghz SIRENZA MARKING SOT-363 transistor amplifier 3 ghz STA-5063 T50Z
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sta-5063zot-363eds-1029905.8ghz+7 | |
LLDRAMContextual Info: Preliminary GS4576C09/18/36L 144-Ball BGA Commercial Temp Industrial Temp 64M x 9, 32M x 18, 16M x 36 576Mb CIO Low Latency DRAM LLDRAM II 533 MHz–300 MHz 2.5 V VEXT 1.8 V VDD 1.5 V or 1.8 V VDDQ Features Introduction • Pin- and function-compatible with Micron RLDRAM II |
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gs4576c09/18/36l144-ball067gb/s/pin4576cxx+1 | |