DSA 362 Search Results

Tackling Multi-Bit Attenuator Designs

Contextual Info: Tackling Multi-Bit Attenuator Designs Designing an accurate digital step attenuator DSA with outstanding RF/microwave performance requires careful attention to detail and knowledge of semiconductor process variables. March 2012 Eric E. Austin, Dr. Haki Cebi, and Dr. Jay Yang

CY7C960

Abstract: CY7C961 CY7C964 MD32 VME64
Contextual Info: 3.5 VMEbus Interface Description 3.5.1 Definition of Terms DSi* Either or both of DS0* and DS1*, the VMEbus data strobe signals DSA* The first of DS0* or DS1* to be asserted DSB* The second of DS0* or DS1* to be asserted 6U, 3U The two most common sizes for VMEbus boards

10 GHz wideband mixer

Abstract: hmc480 AD8370 ADRF6820 HMC394 HMC451 hmc1118
Contextual Info: RF AND MICROWAVE IC Selection Guide 2015 Visit analog.com/RF-microwave 2 RF and Microwave IC Selection Guide 2015 From Antenna to Bits and Back … using a unique combination of design skills, systems understanding, and process technologies, Analog Devices offers

lsi53c710

Abstract: LSI53C720 LSI53C885 53C810 LSI53C770 LSI53C10XX LSI Logic lsi53c876 LSI53C1000 LSI53C815 LSI53C1000 b1
Contextual Info: PROGRAMMING GUIDE SCSI SCRIPTS Processors Version 2.3 October 2000 S14044.A This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.

Contextual Info: P roduct S pecification ^ Z ilß G Z8030/Z8530 Z-BUS SC C SERIAL C o m m u n ic a t io n C o n t r o l l e r Features • Two independent, 0 to 2M bit/second, fullduplex channels, each with a separate crystal oscillator, baud rate generator, and Digital Phase-Locked Loop for clock recovery.

2N117

Abstract: 2N118 2N119 2N11R Cmd 2026 B-IA8 Transistor hall 2S50 9w9w knb 1532
Contextual Info: MIL-S-19500/2B U June 196S SUpEWEDfNG MfL-S-19500/2A 28 May 1963 MfL-S-19500/35B NAVY 3 January 1966 (See 6.2. ) MILITARY SEMICONDUCTOR SPECIF’fCATfON DE VfCE, TRANSISTOR, TYPES 2N117. 2N118, NPN, .WLICON, AND 2N119 LOW-POWER This specification ie ma.~tory

ISO14443-2

Abstract: dsa 362 pj 809 RSA 24 ST19AF08 ST19 GL 6201 ISO7618 ISO14443 ST19SF02
Contextual Info: Multi-Application Smartcard ICs ENHANCED SECURITY ARCHITECTURE The ST19 family extends the power, memory capacity and security of Smartcard ICs. Using a modular design of security proven blocks, this family features high density EEPROM with flash programming,

Contextual Info: Zilog P r o d u c t S p e c i fi c a t i o n Z8038/Z8538 HO FIFO Input/ Output Interface Unit October 1988 Features • 128-byte FIFO buffer provides asynchronous bidirectional CPU/CPU or CPU/peripheral interface, expandable to any width in byte increments by use of multiple FIOs.

Z8530A

Abstract: Z8090
Contextual Info: P r o d u c t S pecifica tio n < $ Z iIß G Z8030/Z8530 Z-BUS SC C SERIAL C o m m u n ic a t io n C o n t r o l l e r Features • Two independent, 0 to 2M bit/second, fullduplex channels, each with a separate crystal oscillator, baud rate generator, and Digital

QorIQ Debug and Performance Monitoring

Abstract: mesa Toshiba MeP secure toshiba mep architecture
Contextual Info: P3041 QorIQ Integrated Multicore Communication Processor Family Reference Manual Document Number: P3041RM Rev 3, 6/2013 P3041 QorIQ Integrated Multicore Communication Processor Family Reference Manual, Rev. 3, 6/2013 2 Freescale Semiconductor, Inc. Contents

Z- FIO

Abstract: dcp 4 z Z8038
Contextual Info: Z I L O G INC 17E D T1ÖM043 DD1E0Ô3 T " T -S £ -3 3 -D 3 Z8038/Z8538 FIO FIFO Input/ Output Interface Unit October 1988 Features • 128-byte FIFO buffer provides asynchronous bidirectional CPU/CPU or CPU/peripheral interface, expandable to any width in byte

88f5181

Abstract: MV-S104858-00 MARVELL 88f5181 88FR571-vd MV64660 Marvell GBE switch MV78100 ARMv5TE Sheeva 88F5181 orion mv78200
Contextual Info: Cover MV76100, MV78100, and MV78200 Discovery Innovation Series CPU Family Functional Specifications Doc. No. MV-S800598-U0, Rev. C December 6, 2008 Marvell. Moving Forward Faster Document Classification: Proprietary Information MV76100/78100/78200 Functional Specifications

MV-S104950-00

Abstract: Marvell 88F6281 88f5181 88F6281 MARVELL 88f5181 MV-S104860-U0 MV-S104950 marvell 88SV131 88F6192 ARMv5TE Sheeva
Contextual Info: Cover 88F6180, 88F6190, 88F6192, and 88F6281 Integrated Controller Functional Specifications Doc. No. MV-S104860-U0, Rev. C December 2, 2008, Preliminary Marvell. Moving Forward Faster Document Classification: Proprietary Information 88F6180/88F619x/88F6281

dsa 362

Abstract: 35015 z-fio Z8001 Z8002 Z8038 Z8060 Z8538 DSA 250-20 2A3J
Contextual Info: ’•'Vs Zilog P ro d u c t S p e c ific a tio n Z 8038/Z 8538 FIO FIFO Input/ Output Interface Unit October 1988 F eatures ■ 128-byte FIFO buffer provides asynchronous b idirectional C PU /C PU or C P U /peripheral interface, exp an d ab le to any width in byte

2sa 1023

Contextual Info: QS723611, QS723621 PRELIMINARY Q High-Speed CMOS 5 1 2 X 3 6 X 2 /1 K X 3 6 X 2 Bi-directional FIFO DESCRIPTION FEATURES/BENEFITS Fast cycle times: 20/25/30/35 ns 50/40/33/28 MHz Functionally Upwards-Compatible with QS725420A Two 512 x 36-bit (QS723611) or 1K x 36-bit

41/CGS313U050W4C

Contextual Info: Type CGS • Computer Grade Capacitors mmmmmmms ms ms B a - a m GENERAL SPECIFICATIONS ■ High CV Product ■ Screw Terminals ■ Suitable for use in most demanding applications requiring high current filtering or energy storage ■ Custom Designs Available

MV78230

Abstract: Xelerated tcam ARMADA 300 ECC ARMADA® XP MP Core Highly Integrated Marvell ARMv7 SoC Processors Datasheet
Contextual Info: MV78230/78x60 Functional Specifications MV78230, MV78260, and MV78460 ARMADA XP Family of Highly Integrated Multi-Core ARMv7 Based SoC Processors Functional Specifications – Unrestricted Doc. No. MV-S107021-U0, Rev. A May 29, 2014, Preliminary Marvell. Moving Forward Faster

v52c4258

Contextual Info: M O S E L VTTEUC V52C4258 MULTIPORT VIDEO RAM WITH 256K X 4 DRAM AND 512 X 4 SAM HIGH PERFORMANCE V52C4258 Max. RAS Access Time, I rac 60 70 80 10 60 ns 70 ns 80 ns 100 ns 25 ns Max. CAS Access Time, Ocac ) 15 ns 20 ns 25 ns Max. Column Address Access Time, Paa )

Contextual Info: EmberZNet 4.7.2 API Reference: For the EM260 Co-Processor December 18, 2012 120-3020-000-4720 Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel:1+ 512 416-8500 Fax:1+(512) 416-9669 Toll Free:1+(877) 444-3032 www.silabs.com Disclaimer The information in this document is believed to be accurate in all respects at the time

Contextual Info: Quality control & Inspection ZERO DEFECT FOR PRODUCTION THAT NEVER FAILS! Customer satisfaction highly depends on the quality of the finished goods or the performance of the machine in use. Zero defect during production is a key criterion for success. The speed of production lines is getting increasingly

NUVOTON 985

Abstract: 9181A
Contextual Info: NCT6102D / NCT6106D Nuvoton LPC I/O Date: January 11th, 2012 Revision 1.0 NCT6102D / NCT6106D Table of Contents – 1. 2. 3. 4. 5. GENERAL

NUVOTON 985

Abstract: fdc 9268
Contextual Info: NCT6102D / NCT6106D Nuvoton LPC I/O Date: January 11th, 2012 Revision 1.0 NCT6102D / NCT6106D Table of Contents – 1. 2. 3. 4. 5. 6. GENERAL DESCRIPTION . . 1

Contextual Info: Electric Utility ENERGY PRODUCTS FOR POWER GENERATION, TRANSMISSION & DISTRIBUTION MARCH 2014 Electric Utility This catalog contains in-depth information on the most comprehensive line of utility products available today for the electric utility marketplace.

dsa 362

Contextual Info: ADE-203-231B Z HM538123B Series 131072-word x 8-bit Multiport CMOS Video RAM H I T A The HM538123B is a 1-Mbit multiport video R A M equipped with a 128-kword x 8-bit dynamic C H I data between R A M and SAM . In addition, it has two modes to realize fast writing in RAM . Block