DUAL Y34 Search Results

dual y34

Abstract: R20 marking 74LVC2G34 74LVC2G34GM 74LVC2G34GV 74LVC2G34GW
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC2G34 Dual buffer gate Product specification Supersedes data of 2003 Jul 25 2004 Sep 10 Philips Semiconductors Product specification Dual buffer gate 74LVC2G34 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 V to 5.5 V

TR MARKING CODE YA

Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC2G34 Dual buffer gate Product specification 2003 Jul 25 Philips Semiconductors Product specification Dual buffer gate 74LVC2G34 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 5.5 V The 74LVC2G34 is a high-performance, low-power,

PB110C

Abstract: PB124A pt36C SCM15 BA5 904 AF P PL80B PR55D pr94a diode transistor pt36c transistor pt42c
Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 02.3, January 2010 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 Features – 1 to 7.8 Mbits memory – True Dual Port/Pseudo Dual Port/Single Port – Dedicated FIFO logic for all block RAM

PB80D

Abstract: PR87A PR98A PR96A PB110C pr94a diode pt36C pr77a transistor pt36c transistor pt42c
Contextual Info: LatticeSC/M Family Data Sheet DS1004 Version 02.3, January 2010 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 Features – 1 to 7.8 Mbits memory – True Dual Port/Pseudo Dual Port/Single Port – Dedicated FIFO logic for all block RAM

TADM042G5

Abstract: dual y34 sim data LG1627BXC TDAT042G5 TRCV012G5 TTRN012G5 DS01001 an30 laser
Contextual Info: Advance Data Sheet November 2000 Dual-Gigabit Ethernet Over SONET/SDH Smart Silicon Solution Overview The dual-gigabit Ethernet GbE over SONET/SDH design is a system solution for transporting GbE frames over existing SONET/SDH rings or point-topoint connections. It is provided using a combination

sd diode mx c425

Abstract: la3291 max8770 gtl SIL1362 smd D2E diode sst39vf080-70-4c-ei XC61CN CH7307 TOSHIBA M9 mini SD socket
Contextual Info: 5 4 3 2 1 Project Name: PecosII IDX80 D D PCB Serial Number: LA-3291 C PecosII Schematics Document C Intel Yonah Dual Core LV1.66G/1.83G (Dual Core ULV1.06G/1.2G) + Calistoga GM + ICH7-M 2006-4-29 B B REV: X0.2 A A Compal Electronics, Inc.(KunShan) Title

Contextual Info: MOTOROLA Order this document by MCM69D536/D SEMICONDUCTOR TECHNICAL DATA MCM69D536 Advance Information 32K x 36 Bit Synchronous Dual I/O, Dual Address SRAM The Motorola MCM 69D536 is a 1 Megabit static random access memory, organized as 32K words of 36 bits. It features common data input and data output

NT7702

Abstract: H117D2 4407SC lcd 240 128 ts NT7702H-TABF4 XCK J Y228 Y239 Y240 Y197
Contextual Info: NT7702 240 Output LCD Segment/Common Driver Features ! Available in a single mode 240-bits shift register or in a dual mode(120-bits shift register x 2) 1. Y1 → Y240 Single mode 2. Y240 → Y1 Single mode 3. Y1 → Y120, Y121 → Y240 Dual mode 4. Y240 → Y121, Y120 → Y1

TLD 521

Abstract: TO 521 MH d 529 d4-450 lcd 240 128 ts TLS 2550 XCK J Y228 NT7704 Y239
Contextual Info: NT7704 240 Output LCD Segment/Common Driver Features ! Available in a single mode 240-bits shift register or in a dual mode(120-bits shift register x 2) 1. Y1 → Y240 Single mode 2. Y240 → Y1 Single mode 3. Y1 → Y120, Y121 → Y240 Dual mode 4. Y240 → Y121, Y120 → Y1

Y51 h 85c

Abstract: Y52 h 85c Y84030 D7690 NT7703 TH 2190 TH 2190 Transistor XCK J Y160 novatek nt
Contextual Info: NT7703 160 Output LCD Segment/Common Driver Features ! Available in a single mode 160-bits shift register or in a dual mode (80-bits shift register x 2) 1. Y1 → Y160 Single mode 2. Y160 → Y1 Single mode 3. Y1 → Y80, Y81 → Y160 Dual mode 4. Y160 → Y81, Y80 → Y1

NT7701

Abstract: MD 202 Y51 h 85c y534 Y160 Y11-1 y141 NT770 986M
Contextual Info: NT7701 160 Output LCD Segment/Common Driver Features ! Available in a single mode 160-bits shift register or in a dual mode (80-bits shift register x 2) 1. Y1 → Y160 Single mode 2. Y160 → Y1 Single mode 3. Y1 → Y80, Y81 → Y160 Dual mode 4. Y160 → Y81, Y80 → Y1

Y51 h 85c

Abstract: md-2800 MD 202 nt7701 XCK J 22-D-6 NT7701H-TAB 986M nt7701htab NT7701HTABF
Contextual Info: NT7701 160 Output LCD Segment/Common Driver Features ! Available in a single mode 160-bits shift register or in a dual mode (80-bits shift register x 2) 1. Y1 → Y160 Single mode 2. Y160 → Y1 Single mode 3. Y1 → Y80, Y81 → Y160 Dual mode 4. Y160 → Y81, Y80 → Y1

Y51 h 85c

Abstract: NT7701HTABF md-2800 NT7701 Y160 986M
Contextual Info: NT7701 160 Output LCD Segment/Common Driver Features ! Available in a single mode 160-bits shift register or in a dual mode (80-bits shift register x 2) 1. Y1 → Y160 Single mode 2. Y160 → Y1 Single mode 3. Y1 → Y80, Y81 → Y160 Dual mode 4. Y160 → Y81, Y80 → Y1

D3S33

Abstract: ST6X86 st6x86p166 AB34 P120 P133 P150 P54C D2H241
Contextual Info: ST6x86 P90+, P120+, P133+, P150+, P166+ 3.52 Volt ST6x86 CPU PRELIMINARY DATA Sixth-Generation Superscalar Superpipelined Architecture - Dual 7-stage integer pipelines - High performance on-chip FPU with 64-bit interface - Operating at P90+ speeds and above

Contextual Info: PRELIMINARY INFORMATION L9D3256M32DBG2 L9D3512M32DBG2 16-32 Gb, DDR3, 256-512M x 32 Dual Channel Memory Module Benefits FEATURES DDR3 Integrated Module [iMOD]: "‚"XDD?XDDS?3057X"/202897X1-203X ‚"3057X"egpvgt/vgtokpcvgf."rwuj1rwnn" K1Q " ‚"Rcemcig<"38oo"z"44oo"z"304oo."

cyrix 6x86 cpu p133

Abstract: 174170 P100 P120 P133 P150 P54C d9fc ST6X86P150 80286 microprocessor paging mechanism
Contextual Info: ST6x86 P90+, P100+, P120+, P133+, P150+, P166+ 80 to 150 MHz 3.52 Volt ST6x86 CPU PRELIMINARY DATA Sixth-Generation Superscalar Superpipelined Architecture - Dual 7-stage integer pipelines - High performance on-chip FPU with 64-bit interface - Operating frequencies of 80 MHz and above

Contextual Info: VSC838 Data Sheet 3.2Gb/s 36x36 Crosspoint Switch FEATURES ● 36 Input by 36 Output Crosspoint Switch ● 66MHz Dual Programming Port ● 3.2Gb/s NRZ Data Bandwidth ● Parallel and Serial Programming Modes ● Non-Blocking Architecture Broadcast and Multicast Capabilities

Contextual Info: VSC838 Data Sheet 3.2Gb/s 36x36 Crosspoint Switch FEATURES ● 36 Input by 36 Output Crosspoint Switch ● 66MHz Dual Programming Port ● 3.2Gb/s NRZ Data Bandwidth ● Parallel and Serial Programming Modes ● Non-Blocking Architecture Broadcast and Multicast Capabilities

lenovo inverter board schematic

Abstract: u15k U254B AT8356908 sst 49lf008a bios chip lenovo t61 tb62506fg lenovo lenovo t60 DSO321SV
Contextual Info: 5 4 3 DC/DC VCC1R5M/VCC1R05B P66 MAX1540ETJ+ DC/DC ( VCC1R8/VCC0R9B) MAX8632ETI+ D VCC1R5B VCC1R05B VCCCPUCORE P57 Dual Channel DDR2 VCC1R8A DDR2_VREF VCC0R9B P5~11 ODD VCC5MUBAY P29 Finger Print X'TAL 32.768K MINI-PCIE WWAN Camera on LCD P43 BT1.2 Module

12c5404

Abstract: PAL 011a C3843 L3803 SBDQ44 V3V REV-1.1 C3523 asus TRANSFORMER T902 ICS954310CGLFT
Contextual Info: 5 4 3 2 Content M9F/J BLOCK DIAGRAM CLK GEN Yonah Dual-Core 01. Block Diagram & Content 02. Yonah - Host 03. Yonah - Power/GND 04. Clock Gen - ICS954310CGLFT 05. Thermal Sensor & Fan 06. Calistoga - Host 07. Calistoga - DMI 08. Calistoga - PCIE 09. Calistoga - SysMEM

Contextual Info: VSC838 Data Sheet FEATURES ● 36 Input by 36 Output Crosspoint Switch ● 66MHz Dual Programming Port ● 3.2Gb/s NRZ Data Bandwidth ● Parallel and Serial Programming Modes ● Non-Blocking Architecture Broadcast and Multicast Capabilities ● Programmable On-Chip I/O Termination

VSC838

Abstract: AN10 AN11 AN12 AN13 AN14 AN15 AN16 AN17 actcl
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Preliminary Data Sheet 3.2Gb/s 36x37 Crosspoint Switch VSC838 Features • 36 Input by 37 Output Crosspoint Switch • 66MHz Dual Programming Port • 3.2Gb/s NRZ Data Bandwidth • Parallel and Serial programming modes • Non-Blocking Architecture Broadcast and Multicast

w810

Abstract: 31264 88E8036 SLD9630TT marvell 88SA8040 SLD 9630 TT CM105X7R104K16A u50511 301-680-1 EMI502
Contextual Info: 1 2 3 4 5 CPU Pentium M P12Clock Generator Dothan uFCPGA 478pin P3,4 P2 CPU Thermal Sensor & Fan D D PSB CRT P21 VGA LVDS LVDS NORTH BRIDGE DUAL CHANNEL DDR2 MXM CONNENTOR PCIEx16 P21 Alviso 915PM PCBGA 1257pin P45 P16,18 P37 S4_3V_POWER_SHUT_DOWN SODIMM-RVS

L43C

Abstract: L130C l44c L239C l220c L235C L97c L62C L81C l31c
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC October 2007 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two