ECL 86 Search Results

b765

Abstract: PAL 008 PAL10016RD8 PAL1016RD8
Contextual Info: PRELIMINARY September 1986 ECL Registered and Latched Programmable Array Logic PAL Family General Description The registered and latched ECL PAL devices are the latest additions to National Semiconductor's ECL PAL family. The ECL PAL family utilizes National Semiconductor's advanced

AN1002

Abstract: MC100EL91 MC100LVEL91 SK100EL91W SK100EL91WD SK100EL91WDT SK100EL91WU
Contextual Info: SK100EL91W Triple PECL to ECL/LVECL and LVPECL to ECL/LVECL Translator PRELIMINARY TEST AND MEASUREMENT PRODUCTS Description Features The SK100EL91W is a triple PECL to ECL/LVECL and LVPECL to ECL/LVECL translator. It is fully compatible with MC100EL91 and MC100LVEL91. The SK100EL91W

divide-by-10

Contextual Info: Issued March 1997 232-2598 Data Pack H 575 MHz ÷ 10/11 prescaler IC Data Sheet RS stock number 302-378 The 8680 is an ECL emitter coupled logic prescaling counter with both ECL 10K and TTL compatible outputs. The circuit will operate from either ECL or TTL

Contextual Info: SPST ECL Switches With Drivers 2662 Series V2.00 Features ● ● ● Broadband Frequency Ranges Environmentally Sealed ECL Compatible Description M/A-COM’s Emitter Coupled Logic ECL PIN diode switches offer multi-octave bands from UHF to Ku-band. Advantages of an ECL switch are narrow pulse width

Contextual Info: Issued July 1983 004-923 Data Pack H 575 MHz ÷ 10/11 prescaler IC Data Sheet RS stock number 302-378 The 8680 is an ECL emitter coupled logic prescaling counter with both ECL 10K and TTL compatible outputs. The circuit will operate from either ECL or TTL

ecl 10K compatible

Contextual Info: Issued July 1983 H4923 575MHz Ö 10/11 prescaler ic Stocknumber 302-378 The 8680 is an ECL emitter coupled logic prescaling counter with both ECL 10K and TTL compatible outputs. The circuit will operate from either ECL or TTL power supplies as required. The division ratio is set by

Nippon capacitors

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple PECL to ECL Translator The MC100LVEL/EL91 is a triple PECL to ECL translator. The MC100LVEL91 receives low voltage PECL signals and translates them to differential ECL output signals. The MC100EL91 receives standard

LVEL91

Abstract: Nippon capacitors
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple PECL to ECL Translator The MC100LVEL/EL91 is a triple PECL to ECL translator. The MC100LVEL91 receives low voltage PECL signals and translates them to differential ECL output signals. The MC100EL91 receives standard

LVEL91

Abstract: DL140 MC100EL91 MC100LVEL91 SE540 Nippon capacitors
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple PECL to ECL Translator The MC100LVEL/EL91 is a triple PECL to ECL translator. The MC100LVEL91 receives low voltage PECL signals and translates them to differential ECL output signals. The MC100EL91 receives standard

SP8678

Abstract: SP8678B DG14 SP6678
Contextual Info: SP8678B 1500MHz * 8 The SP8678B is an asynchronous ECL counter which provides ECL com patible outputs. It features an ECL com patible input inhibit which simplifies the design of frequency counters and other instrumentation. NC [ 1 FEATURES ^ * ] Vcc OV

MC100EP90

Abstract: MC100EP90DT MC100EP90DTR2 MC10EP90 MC10EP90DT MC10EP90DTR2 100EP90 transistor marking code 1325
Contextual Info: MC10EP90, MC100EP90 -3.3V / -5VĄTriple ECL Input to LVPECL/PECL Output Translator The MC10/100EP90 is a TRIPLE ECL TO LVPECL/PECL translator. The device receives differential LVECL or ECL signals and translates them to differential LVPECL or PECL output signals.

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple PECL to ECL Translator MC100LVEL91 MC100EL91 The MC100LVEL/EL91 is a triple PECL to ECL translator. The MC100LVEL91 receives low voltage PECL signals and translates them to differential ECL output signals. The MC100EL91 receives standard

8680B

Contextual Info: P^pi GEC PLESSEY ADVANCE INFORMATION DS3645-1-2 SP8680B 575MHz-4-10/11 The SP8680B is an ECL variable modulus divider, with ECL and TTL compatible outputs. The circuit can operate from either ECL or TTL supplies. It divides by 10 when either of the ECL control inputs, PET or FE2, is in the high state and by 11

Contextual Info: SY100EP16V Product Brief 3.3V/5V Precision ECL Differential Receiver/Driver Description The SY100EP16V is a 3.3/5V, high-speed, fully differential ECL, with fast rise/fall times guaranteed to be less than ECL Receiver/Driver that can process clocks up to 3GHz

HLT24

Abstract: KLT24 ELT24 MC100ELT24 HT24 MC10ELT24
Contextual Info: MC10ELT24, MC100ELT24 5VĄTTL to Differential ECL Translator The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5V, -5.2V or -4.5V and ground are required. The small outline 8-lead package and the single gate of the

Contextual Info: SY10/100EP16U Product Brief 2.5/3.3V Precision ECL Differential Receiver/Driver Description The SY10/100EP16U is a 2.5/3.3V, high-speed, fully voltage. The output is 800mV ECL, with fast rise/fall times differential ECL Receiver/Driver that can process clocks up

Contextual Info: DP8480A DP8480A 10k ECL to TTL Level Translator with Latch Literature Number: SNOSBN8A DP8480A 10k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

Contextual Info: DP8482A DP8482A 100k ECL to TTL Level Translator with Latch Literature Number: SNOSBO0A DP8482A 100k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

Contextual Info: 100K ECL Digital Delay Unit SERIES: DDU-18 100K ECL Interfaced 24 Pin DIP data \Q * \ delay W devices;Inc. Features: • Input & output buffered. ■ 8 equally spaced taps. ■ Com patible with ECL circuits. Specifications: ■ Total delay tolerance: ±5% or 1 ns

ELT25

Abstract: HLT25 HT25 KLT25 MC100ELT25 MC10ELT25
Contextual Info: MC10ELT25, MC100ELT25 -5VĄDifferential ECL to TTL Translator The MC10ELT/100ELT25 is a differential ECL to TTL translator. Because ECL levels are used, a +5 V, -5.2 V or -4.5 V and ground are required. The small outline 8-lead package and the single gate of the

CTR34

Abstract: FGE2000 BL33B DFI01 Fairchild ZN 1010 L1332 JKI02 ctr-34 SHR04 OAI43
Contextual Info: NATL SEMICOND -CMEnORY> □2E D | ts D iia b □□bi3n ? I FGE Series ECL Gate Arrays FAIRCHILD A Schlumberger Company Description FGE Series Features The FGE Series of ECL gate arrays are the fastest silicon gate arrays commercially available. These advanced ECL gate ar­

Contextual Info: 100329 100329 Low Power Octal ECL/TTL Bidirectional Translator with Register Literature Number: SNOS122A 100329 Low Power Octal ECL/TTL Bidirectional Translator with Register General Description The 100329 is an octal registered bidirectional translator designed to convert TTL logic levels to 100K ECL logic levels

Contextual Info: TIEPAL10016P8-6C HIGH PERFORMANCE IMPACT ECL PAL CIRCUIT D 3 0B 2. DECEMBER 19 B7 • ECL 100K PAL • High-Performance Operation

DP8481

Contextual Info: DP8481 DP8481 TTL to 10k ECL Level Translator with Latch Literature Number: SNOSBN9A DP8481 TTL to 10k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with