EPLD 5128 Search Results

74series

Abstract: Altera EPM5128
Contextual Info: ALTERA CORP bflE D m 05^5372 DG03321 MIM H A L T EPM 5128A EPLD Features □ High-density, second-generation MAX 5000 EPLD developed on an advanced 0.65-micron CMOS EPROM process Higher-speed upgrade for existing EPM5128 designs High-speed multi-LAB architecture

5128A

Abstract: EPLD 5128
Contextual Info: EPM 5128A EPLD Features □ □ Preliminary Information □ □ □ High-density, second-generation MAX 5000 EPLD developed on an advanced 0.65-m icron CM OS EPROM process Higher-speed upgrade for existing EPM5128 designs High-speed multi-LA B architecture

Altera EPM5128

Abstract: KX-K 8.0 MHz
Contextual Info: EPM 5128 EPLD Features • ■ High-density, 128-m acrocell, general-purpose MAX 5000 EPLD High-speed m ulti-LAB architecture tpD as fast as 15 ns Counter frequencies up to 83.3 MHz Pipelined data rates up to 100 MHz 256 shareable expander product terms “expanders" allow ing over

74151 PIN DIAGRAM

Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B
Contextual Info: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase

C3402

Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
Contextual Info: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase

7400 series TTL pinouts

Abstract: EPLD 5128
Contextual Info: EPM 5128 EPLD Features □ □ High-density 128-macrocell general-purpose M AX 5000 EPLD 256 shareable expander product terms that allow over 32 product terms in a single macrocell High-speed multi-LAB architecture tPD as fast as 25 ns Counter frequencies up to 50 MHz

EPLD 5128

Abstract: EPM5128-1 K942
Contextual Info: EPM5128 EPLD Features □ □ □ □ □ H igh-density, 128-macrocell, general-purpose MAX 5000 EPLD High-speed multi-LAB architecture t PD as fast as 25 ns Counter frequencies up to 50 MHz Pipelined data rates up to 62.5 MHz 256 shareable expander product terms "expanders" allowing over

M5962

Abstract: ep 1810 program EP610 ORDERING 5032DM altera ep320 EPS448LC-25 EPM 5192 PLMD5032 J5192 EPS448
Contextual Info: Ordering EPLDs Figure 1 show s how an EPLD part num ber is constructed. For inform ation on specific package, grade, and speed com binations, refer to individual EPLD data sheets or the Product Selection Guide in this data book, or telephone the Altera M arketing D epartm ent at 408 984-2800.

EPLD 5128

Abstract: EPM5120-2
Contextual Info: EPM5128 EPLD Features □ □ H ig h -d en sity 128-m acrocell g en era l-p u rp o se M A X 5000 EPLD 256 sh areab le ex p a n d e r p ro d u ct term s th at allow ov er 32 p ro d u ct term s in a sin gle m acro cell H ig h -sp eed m u lti-L A B a rch itectu re

Contextual Info: CY7C340 EPLD Family 0 CYPRESS Multiple Array Matrix High-Density EPLDs — VHDL simulation ViewSim Features • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions • 0.8-micron double-metal CMOS EPROM technology (CY7C34X)

EPM5128JC

Abstract: EPM5064 EPM5130 Altera EPM5128 Altera September 1991
Contextual Info: ANU MPLDs Mask-Programmed Logic Devices September 1991, ver. 1 Data Sheet Features □ □ □ □ □ □ □ □ □ General Description M asked versions of EPLD designs Reduced cost for large-volum e applications A vailable for E P1810, EPM 5032, E PM 5064, EPM 5128, EPM 5130,

epm5032dc

Abstract: 5130Q 5128A 74151 waveform 7C340 epld 342B rc 74151
Contextual Info: CY7C340 EPLD Family •= CYPRESS Multiple Array Matrix High-Density EPLDs Features — VHDL sim ulation ViewSim M • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions — Available on PC and Sun platforms

74151 waveform

Abstract: CY7C340 5128LC 7C340 programming 7C340 CY7C341B CY7C342B CY7C344 CY7C346 FLASH370
Contextual Info: 7c340: 12-13-90 Revision: October 19, 1995 CY7C340 EPLD Family Multiple Array Matrix HighĆDensity EPLDs called expander product terms. These exĆ Ċ VHDL simulation ViewSimt Ċ Available on PC and Sun platforms panders are used and shared by the macroĆ

74151

Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
Contextual Info: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of

Contextual Info: MPM5128 MPLD Features □ □ □ □ □ □ □ □ General Description C M O S, M a sk -P ro g ra m m e d L o g ic D ev ice M P L D ca p a b le of im plem enting high-density custom logic functions H igh-volum e replacem ent for EPM 5128 EPLD designs

Altera EPM5128

Abstract: EPM5128 EPM5128-1 K941 DSTS372 EPM5128-2 EPM5128A-15 EPM5128A-20 K1188
Contextual Info: EPM5128 EPLD Figure 14. EPM5128 Package Pin-Out Diagrams Package outlines no t drawn to scale. See Tables 4 and 5 in this data sheet fo r pin-out information. Windows in ceramic packages only. . n n n n nn n n n n n nnn nn n I/O C I/O c 3 I'O □ I/O □ i/o

5130G

Abstract: 5192G rc 74151 5192LC
Contextual Info: CY7C340 EPLD Family '# CYPRESS Features • E rasab le, u ser-con figu rab le C M O S E P L D s cap ab le o f im p lem en tin g h igh d en sity cu stom logic fu n ction s • 0.8'in icron d ou b le-m etal C M O S E P R O M tech n ology C Y 7C 34X • A dvanced 0.65-m icron C M O S

51h11

Abstract: C1058
Contextual Info: EPM 5128 E PLD Features • ■ ■ ■ ■ ■ Figure 14. EPM5128 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 4 and 5 in this data sheet fo r pin-out information. Windows in ceramic packages only. , nnnnnnnnnnnnnnnnn i/o c I/O c

Altera EPM5128

Abstract: WKX 62 EPM5016 epm5130 pinouts for 7400 series EPM5064 EPM5192 program EPM5032 EPM5128 PACKAGING PLDS-MAX
Contextual Info: EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals.

EPM5130

Contextual Info: A L TE RA CORP □5*15372 0 0 D 2 1 4 2 4bT « A L T 47E D 'P f D - 0 l EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from

programming manual EPLD EPS448

Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
Contextual Info: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,

EPLD 5128

Contextual Info: September 1991, ver. 2 Introduction Application Brief 73 Altera provides a variety of softw are utility pro gra m s that co m p le m e n t the M A X + P L U S II, M A X + P L U S , A + P L U S , S A M + P L U S , a n d M C M a p d ev elop m en t systems. These pro gram s are available via Altera's electronic bulletin board service

ALTERA MAX 5000

Abstract: EPM5016 jlcc 32 R program EPM5032 epm5128a ALTERA MAX 5000 programming
Contextual Info: M A X 5 0 00/EPS464 Programmable Logic Device Family Data Sheet August 1993, ver. 1 □ Features □ □ □ □ □ □ □ □ □ Advanced M ultiple Array M atrix MAX 5000/E P S464 architecture com bining speed and ease-of-use of PAL devices with density of

altera EP300

Abstract: EPM7128 EPLD ep330 mpm5192 MPM512 MPM5128 alternative bipolar transistors book
Contextual Info: M M r M p , 0 9 ra m m r .lv Data Sheet September 1991, ver. 2 Introduction 0 £ Programm able Logic Devices also described as P A L s , P L A s, F P L A s, PLD s, E P L D s , E E P L D s , LC A s, and F P G A s combine the logistical advantages of standard, fixed integrated circuits with the architectural flexibility of custom