ERM 547 NT Search Results

SDIO CARD Layout

Abstract: MHC4-07091018 SD CARD EDGE
Contextual Info: _ 8 _ ._ I_ File No. 547 S H EET ± ¿ 2_ SPECIFICATION C u rrent R a ting :0 .5 A AC DC Voltage R a tin g :5 0 0 VAC Min C o n ta ct R esistance: 10O M illiohm s Max Insulation R e s is ta n c e ^ OOOMegohms Min At 500VDC O perating T e m p e ra tu e r:—2 5 'C ~ + 8 5 'C

ET-20D

Contextual Info: Crimp Contact Type Connector HOW TO ORDER O AM A -15 P-FO P A M A F -15S-FO D *M AType • • • ;• • I • i • FEATURES • • • C rim p S nap-In C ontacts T erm ination is by crim p con tacts using sta n d a rd crim p too ls. Term inated co n ­

Contextual Info: FAST CMOS 18-BIT REGISTERED TRANSCEIVER IDT54/74FCT16501 AT/CT/ET IDT54/74FCT162501 AT/CT/ET IDT54/74FCT162H501 AT/CT/ET Untegiated D ev ize T ech n ology, l i e . FEATURES: CMOS technology. These high-speed, low -pow er 18-bit reg­ istered bus transceivers com bine D-type latches and D-type

C546B

Abstract: BC547 sot54 C546A c546 B c546 ph BC547 BC546 C546 A BC547 BC546 philips semiconductors c5476 C546
Contextual Info: DISCRETE SEMICONDUCTORS Product specification Supersedes data of 1997 Mar 04 Philips Sem iconductors 1999 Apr 15 PHILIPS Philips Semiconductors Product specification NPN general purpose transistors BC546; BC547 FEATURES PINNING • Low curren t max. 100 mA

JC547

Abstract: JC546
Contextual Info: DISCRETE SEMICONDUCTORS Product specification Supersedes data of 1997 Mar 14 Philips Sem iconductors 1999 Apr 27 PHILIPS Philips Semiconductors Product specification NPN general purpose transistors JC546; JC547; JC548 FEATURES PINNING • Low curren t max. 100 mA

Contextual Info: SPECTRUM CONTROL INC. MIL-C-38999, Compact Shell Ordering Information Materials and Finishes The many benefits of using Spectrum’s compact shell design are detailed on page 137. Review the benefits and specifications provided to determine if these space

TDA7260

Abstract: capacitor 470nf25v TDA7232 18 zr TDA 2011 TDA7268 100KA SGSP321 TDA7268 S
Contextual Info: rZ 7 A 7# S G S -T H O M S O N g HIGH EFFICIENCY AUDIO PWM DRIVER • ■ ■ . ■ ■ HIGH EFFICIENCY P0 = 30 W W ITH POWER MOS BRIDGE LOW DISTORTION SINGLE SUPPLY OPERATION MUTING FACILITY TH ERM AL AND SHO RT-CIRCUIT PROTEC­ TION ■ DUMP PROTECTION D E S C R IP T IO N

PCB- 94v-0

Abstract: 2N 10261 transistor SCANBE 11633-2 SCANBE ejector S-202 SCANBE* s-202 2N 10261 transistor application circuit SCANBE ejector L4860 SDC 2921 SCANBE connector s-203
Contextual Info: S h iW ß iv n r Snap-In Card Guides Flame Retardant Guides Deep Channel Guides PCMCIA Card Guides Vertical Card Guides Interchangeable Guides Circular Card Guides Narrow Card Guides A nti-S tatic Card Guides Inserters & Extractors Card Ejectors & Handles

BDX20

Abstract: TRANSISTOR BDX 14 transistor BDX 65 TRANSISTOR BDX
Contextual Info: *B D X 20 PNP S ILIC O N TR A N S IS T O R , E P IT A X IA L BASE T R A N S IS TO R PNP S IL IC IU M , B A S E E P IT A X IE S Compì. 2N 3442 Preferred device D is p o s itif re co m m a n d é LF large signal power amplification A m p lific a tio n B F grands sig naux de puissance

AT27LV040A-15JC

Contextual Info: Features * Fast Read Access Tim e - 90 ns * Dual Voltage Range Operation - Low Voltage Power Supply Range, 3.0V to 3.6V or Standard 5V ± 10% Supply Range * Compatible With JEDEC Standard AT27C040 * Low Power 3.3-volt CMOS Operation - 20 pA max. less than 1 |j A typical Standby for Vcc = 3.6V

uk ah 102 m capacitor

Abstract: DFP 830 uk ah 102 m capacitor
Contextual Info: Features * Fast Read Access Tim e - 90 ns * Low Power CMOS Operation - 100 |jA max. Standby - 40 mA max. Active at 5 MHz * JEDEC Standard Packages - 32 Lead PLCC - 32-Lead 600-mii PDIP and Cerdip - 32-Lead 450-mil SOIC SOP - 32-Lead TSOP * 5 V + 10% Supply

Contextual Info: MCM10470*15 MCM10470*25 M O TO R O LA A d van ce In form ation MECL 4096 x 1-BIT RANDOM ACCESS MEMORY 4096 x 1-BIT RANDOM ACCESS MEMORY The MCM10470 is a 4096-bit Read/W rite RAM organized fo r 4096 w o rd s by 1 bit. Data is selected or stored by means o f a 12b it address A0 th ro u g h A11 decoded on the chip. The chip is

Contextual Info: SIEMENS Dual Power O perational Am plifier TCA 2465 B ip o la r 1C Features • High o utput peak current of tw ice 2.5 A • T w ice 2.0 A o utput peak current for T C A 2465 G • Large su pply voltage range up to 42 V • High slew rate of 2 V/|.is •

Contextual Info: DISCRETE SEMICONDUCTORS Product specification Supersedes data of 1997 Jul 02 Philips Sem iconductors 1999 Apr 27 PHILIPS Philips Semiconductors Product specification PNP general purpose transistors JC556; JC557; JC558 FEATURES PINNING • Low curren t max. 100 mA

ATIC 164 D2

Abstract: dece2x4 ATIC 164 D2 44 pin ATIC 164 D2 48 pin
Contextual Info: A10M20A Mask Programmed Gate Array Preliminary Features Description • H igh G a te C o u n t: 2000 g a te arra y gates 5000 P L D /L C A e q u iv alen t g ates • P in-for-Pin C o m p atib le w ith A ctel's A 1020A F P G A a t Low er C ost • E asy C onvension F rom F P G A to M ask Pro g ram m ed G ate

AT29C256

Abstract: AT29C256-12 AT29C256-15 AT29C256-70 AT29C256-90 AT29C256-15TI
Contextual Info: Features • Fast Read Access Time - 70 ns • 5-volt Only Reprogramming • Page Program Operation - Single Cycle Reprogram Erase and Program - Internal Address and Data Latches for 64 Bytes • Internal Program Control and Timer • Hardware and Software Data Protection

Contextual Info: XC7336 36-Macrocell CMOS EPLD £XILINX* Product Specifications interconnected by the 100%-populated Universal Intercon­ nect Matrix UIM . Features • Ultra high-performance EPLD - 5 ns pin-to-pin speed on all fast inputs - 167 M Hz maximum clock frequency

54FCT863BDB

Contextual Info: REVISIONS DATE YR-MO-DA DESCRIPTION LTR APPROVED REV SHEET REV SHEET REV STATUS OF SHEETS Ri•V SHEET 1 2 3 4 5 6 7 8 9 11 12 10 13 14 PMIC N/A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 STANDARDIZED MILITARY MICROCIRCUIT, DIGITAL, FAST CMOS 9-B IT

Contextual Info: r = 7 S C S -T H O M S O N L6285 ^ 7 # 3 CHANNELS MULTIPOWER SYSTEM A D V A N C E DATA • CHANNEL-A AND C HA NNEL-B FOR UNIPO ­ LAR STEPPER MOTORS — LOW SIDE: R d s o n = 1 .2 0 - H IG H SIDE ; R d s o n = 1.2 0 ■ CHANNEL-C FOR DC M OTORS —LOW SIDE: R d s o n = 1 .7 0

54ALS29821

Contextual Info: DFSf FORM *19? St.r o / D IS T R IB U T IO N S T A T E M E N T A . * U.S. GOVERNMENT PRINTING OFFICE: 19f7 — 74S-129/609 1 A p p ro v e d fo r p u b lic r e le a s e ; d i s t r ib u t io n Is u n lim it e d . 5962—E1618 1. SCOPE 1.1 Scope. T h is dra w in g d e s c rib e s d e v ic e re q u ire m e n ts f o r c la s s B m ic r o c ir c u it s in accordance

AT49F001

Contextual Info: Features • Single Voltage Operation - 5V Read - 5V Reprogramming • Fast Read Access Time - 55 ns • Internal Program Control and Timer • Sector Architecture - One 16K Byte Boot Block with Programming Lockout - Two 8K Byte Parameter Blocks - Two Main Memory Blocks 32K, 64K Bytes

"alu 4 bit"

Abstract: dece2x4
Contextual Info: ACT 1 Field Programmable Gate Arrays Features Description • U p to 2000 G a te A rra y G ates 6000 P L D /L C A ™ eq u iv alen t gates • R eplaces u p to 53 I T L Packages T h e A C T ™ 1 fam ily o f field p ro g ram m ab le gate arrays (FPG A s)

str f 6456

Abstract: str x 6456 SM 5126 BP STR F 6168 str 6668 STR G 6352 STR 6456 str f 6468 321 CJ 7121 AXP 209 IC
Contextual Info: Tem ic Se ni i co n fi li c t ci Sales Offices rs Addresses Europe France TE M IC France Les Q uadrants 3. avenue du centre B.P. 309 78054 S t.-Q uentin-en-Y veL nes Cedex Tel: 33 I 3060 7000 F a x :33 I 3060 V 11 i Germany TE M IC TE LEFU N K EN m icroelectronic G m bH

Contextual Info: NN51V4265A series EDO Hyper Page Mode CMOS 256 K x 16bit Dynamic RAM NPN/À DESCRIPTION The N N 51V4265A series is a high perform ance C M OS D ynam ic Random Access M em ory organized as 262,144 words by 16 bits. The NN51V4265A series is fabricated with advanced C M OS technology and designed with innovative design