FCR6 DC Search Results

Contextual Info: FCR6-1212-6 Linear ICs dc-to-dc/Charge Pump Voltage Converter status Military/High-RelN Output Voltage Nominal V 12 Load Current Max. (A)250m Drop-Out Volt Max. P(D) Max. (W)6 Nom. Supp (V)5 Minimum Operating Temp (øC)-25 Maximum Operating Temp (øC)71 Package StyleModule

Contextual Info: FCR6-1515-6 Linear ICs dc-to-dc/Charge Pump Voltage Converter status Military/High-RelN Output Voltage Nominal V 15 Load Current Max. (A)200m Drop-Out Volt Max. P(D) Max. (W)6 Nom. Supp (V)5 Minimum Operating Temp (øC)-25 Maximum Operating Temp (øC)71 Package StyleModule

Contextual Info: FCR6-1205-6 Linear ICs dc-to-dc/Charge Pump Voltage Converter status Military/High-RelN Output Voltage Nominal V 12 Load Current Max. (A)450m Drop-Out Volt Max. P(D) Max. (W)6 Nom. Supp (V)5 Minimum Operating Temp (øC)-25 Maximum Operating Temp (øC)71 Package StyleModule

0505n

Abstract: fcu 7-6060-6
Contextual Info: FCR, 12CR, 24CR, FCU, ICR, IWR FCR6-., 12 CR6-., 24 CR6-., F C U 7-. • Output pow er 6.7 W • T w o isolated outputs n0 • Series o r parallel configurations possible • High reliability • Input/output isolation 500 V rms • Input filter incorporated

2SB202

Abstract: 2SB200
Contextual Info: uei> FEATURES DIRECTLY REPLACES STANDARD INCANDECSENTS 10 Y E A R / 1 0 0 , 0 0 0 H O U R S S O L I D STATE - HIGH S H O C K & V I BRATI ON R E S I S T A N C E B U I L T - I N C U R R E N T LIMITING R E S I S T O R FOR DI RECT AC & DC V OL T A GE S . 2 V TO 1 2 0 V d c / V a c

crystal 7.3728MHz

Abstract: ANSI Y14.5 sim 300 modem datasheet 16C550 KK16C554PL KK16C554TQ 7.3728mhz
Contextual Info: KK16C554PL/KK16C554TQ QUAD-UART ASYNCHRONOUS COMMUNICATIONS ELEMENT 1. General Description KK16C554 is an enhanced quadruple version of the 16C550 UART Universal Asynchronous Receiver Transmitter . Each channel can be put into FIFO mode to relieve the CPU of excessive software overhead. In this mode, internal

16C550

Abstract: IN16C554PL IN16C554TQ crystal 7.3728MHz
Contextual Info: IN16C554PL/IN16C554TQ QUAD-UART ASYNCHRONOUS COMMUNICATIONS ELEMENT 1. General Description IN16C554 is an enhanced quadruple version of the 16C550 UART Universal Asynchronous Receiver Transmitter . Each channel can be put into FIFO mode to relieve the CPU of excessive software overhead. In this mode, internal

NEC D765

Abstract: 8272 floppy disk controller block diagram of 8272 floppy disk controller 82C226 8272A floppy disk controller block diagram NEC uPA 63 H floppy disk controller 8272 CHIPS TECHNOLOGIES MR 250-2.-5 NS16550
Contextual Info: CH I P S . im a £ TE C H N O L O G I E S INC 12E D | SO'ìflllb 0 0 0 1501 b | u u u m .,u iu C H I ir ^ S -T -5 2 -3 3 -D 5 82C607 M ultifunction Controller Single Chip UART and Analog Data Separator

crystal 7.3728MHz

Abstract: datasheet of 16450 UART MCR 65-6 SB16C554 ANSI Y14.5 ior scr sim 300 modem datasheet uart 16c550 16C450 16C550
Contextual Info: IN16C554PL/IN16C554TQ QUAD-UART ASYNCHRONOUS COMMUNICATIONS ELEMENT NOVEMBER 2002-REVISED AUG 2006 1. General Description IN16C554 is an enhanced quadruple version of the 16C550 UART Universal Asynchronous Receiver Transmitter . Each channel can be put into FIFO mode to relieve the CPU of excessive software overhead. In this

8272 floppy disk controller

Abstract: intel floppy disk controller 8272a intel floppy disk controller 8272 floppy disk controller 8272 im 358 micro MP 1008 es rts 5821 82C226 DSR 505 f 4556
Contextual Info: m s:, .s i: . m r s 82C 607 M u ltifu n c tio n C o n tro lle r Single Chip UART and Analog Data Separator m Easy interface to the Industry standard floppy disk controllers (765A/765B/8272A 100% functionally compatible to the IBM PS/2 model 50, 60, and 80

6c5s

Abstract: 121-1190 16C450 44-PIN DS1488 NS16550A WD16C450
Contextual Info: SYSTEMS LOGIC/PERIPHERAL WD16C550 Enhanced Asynchronous Communications Element ACE with FlFOs aee WESTERN DIGITAL WD16C550 TABLE OF CONTENTS Page Section Title 1.0 INTRODUCTION 1.1 Description 1.2 Features 1.1 General 3-1 3-1 3-1 3-2 2.0 CHIP SELECTION AND REGISTER ADDRESSING

WD16C452

Abstract: WD16C450 WD16C552 16C552
Contextual Info: SYSTEIIS L061C/PERIPHERAL WD16C452, WD16C552 Dual Enhanced Asynchronous Communications Element ACE with Parallel Port W. WESTERN DIGITAL WD16C4521WD16C552 TABLE OF CONTENTS Section Title Page 1.0 INTRODUCTION 1.1 Description 1.2 Features 1.3 General 2-1

TL16C554

Abstract: 7434 buffer TL16450 TL16C450 TL16C550 TL16C550B SLLS165B
Contextual Info: TL16C554 ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS165B – JANUARY 1994 – REVISED MARCH 1996 D D D D D D Integrated Asynchronous Communications Element Consists of Four Improved TL16C550 ACEs Plus Steering Logic In FIFO Mode, Each ACE Transmitter and Receiver Is Buffered With 16-Byte FIFO to

TL16450

Abstract: TL16C450 TL16C550 TL16C550B TL16C554 TL16C554FN TL16C554FNR TL16C554I TL16C554IFN
Contextual Info: TL16C554, TL16C554I ASYNCHRONOUS COMMUNICATIONS ELEMENT ą ąą SLLS165G − JANUARY 1994 − REVISED MARCH 2006 D Integrated Asynchronous Communications D D D D D D D Element Consists of Four Improved TL16C550 ACEs Plus Steering Logic In FIFO Mode, Each ACE Transmitter and

EIA232-D

Abstract: MS-011 MS-018 NS16550A TL16C450 TL16C550B TL16C550BI
Contextual Info: TL16C550B, TL16C550BI ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS136B – JANUARY 1994 – REVISED AUGUST 1996 D D D D D D D D Capable of Running With All Existing TL16C450 Software After Reset, All Registers Are Identical to the TL16C450 Register Set In the FIFO Mode, Transmitter and Receiver

EIA232-D

Abstract: NS16550A TL16C450 TL16C550B
Contextual Info: TL16C550B ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS136A – JANUARY 1994 – REVISED MARCH 1996 D D D D D D D D Capable of Running With All Existing TL16C450 Software After Reset, All Registers Are Identical to the TL16C450 Register Set In the FIFO Mode, Transmitter and Receiver

NS16550A

Abstract: TL16C450 TL16C550A
Contextual Info: TL16C550A Asynchronous Communications Element Hardware-Manual Edition March 1996 PHYTEC Meßtechnik GmbH • Robert-Koch-Straße 39 • D-55129 Mainz Telefon: +49 6131 9221-0 • Telefax: +49 (6131) 9221-33 WWW: http://www.phytec.de • E-Mail: info@phytec.de

NS16550A

Abstract: TL16C450 TL16C550A
Contextual Info: TL16C550A ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS057D – AUGUST 1989 – REVISED MARCH 1996 D D D D D D D D Capable of Running With All Existing TL16C450 Software D After Reset, All Registers Are Identical to the TL16C450 Register Set In the FIFO Mode, Transmitter and Receiver

TL16C554

Abstract: MS-018 MS-026 TL16450 TL16C450 TL16C550 TL16C550B TL16C554I
Contextual Info: TL16C554, TL16C554I ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS165D – JANUARY 1994 – REVISED JULY 1998 D D D D D D D D Integrated Asynchronous Communications Element Consists of Four Improved TL16C550 ACEs Plus Steering Logic In FIFO Mode, Each ACE Transmitter and

16C551

Abstract: WD16C451 WD16C551 ttl buffer 74LS245
Contextual Info: SYSTEMS LOGIC/PERIPHERAL WD16C451, WDl6C551 Enhanced Asynchronous Communications Element ACE with Parallel Port 9'}. WESTERN DIGITAL WD16C4511WD16C551 TABLE OF CONTENTS Section Page Title 1.0 INTRODUCTION 1.1 Description 1.2 Features 1-1 1-1 1-1 2.0 SIGNAL DESCRIPTIONS

NS16550A uart

Contextual Info: 6.0 Serial Ports Bits 0,1 These two bits specify the number of data bits in each transmitted or received serial character. The encoding of bits 0 and 1 is as follows: Each of these serial ports functions as a serial data input/ output interface in a microcomputer system. The system

Contextual Info: TL16C550A ASYNCHRONOUS COMMUNICATIONS ELEMENT D3128.AUG UST1989- HEVISEDFEBRUARY 1990 • Capable o f Running w ith A ll Existing TL16C450 Software N PACKAGE TOP VIEW • A fte r Reset, A ll R egisters Are Identical to the TL16C450 Register Set DOC l U D1C

ace dm he tv

Abstract: tda 1047 NS16550A TL16C450 TL16C550B
Contextual Info: TL16C550B ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS136A-JANUARY 1994- REVISED MARCH 1996 Capable of Running With All Existing TL16C450 Software After Reset, All Registers Are Identical to the TL16C450 Register Set In the FIFO Mode, Transmitter and Receiver

EIA232-D

Abstract: MS-011 MS-018 NS16550A TL16C450 TL16C550B TL16C550BI
Contextual Info: TL16C550B, TL16C550BI ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS136B – JANUARY 1994 – REVISED AUGUST 1996 D D D D D D D D Capable of Running With All Existing TL16C450 Software After Reset, All Registers Are Identical to the TL16C450 Register Set In the FIFO Mode, Transmitter and Receiver