FIGURE25 Search Results

TLE2062B

Contextual Info: TLE2062, TLE2062A, TLE2062B, TLE2062Y EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE jiPOW ER DUAL OPERATIONAL AM PLIFIERS D3346, OCTOBER 1989 - REVISED NOVEMBER 1991 availablefeatures • Excellent Output Drive Capability V 0 = ± 2.5 V Min at R|_ = 100 Q , VC C ± = ± 5 V

TRANSISTOR mcr 100-8

Contextual Info: MOTOROLA MC33389 SEMICONDUCTOR TECHNICAL DATA SBC System basis chip Advance Information Automotive System Basis Chip The MC33389 is a monolithic integrated circuit combining many functions frequently used by automotive ECUs. It incorporates a low speed fault

ba1s

Contextual Info: IS43LR32400E Advanced Information 1M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43LR32400E is 134,217,728 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 1,048,576 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The address lines are multiplexed with the Data

IS43LR16640A

Abstract: IS43LR16640A-5BLI IS43LR16640A-6BLI IS46LR16640A-5BLA1 IS43LR16640A-6BL
Contextual Info: IS43/46LR16640A Advanced Information 16M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16640A is 1,073,741,824 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 16,777,216 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

bt 2323

Abstract: TX-2G
Contextual Info: AWL9966 802.11a/b/g/n WLAN/Bluetooth FEIC PRELIMINARY DATA SHEET - Rev 1.2 FEATURES • 3% Dynamic EVM @ POUT = +17 dBm with IEEE 802.11a 64 QAM OFDM at 54 Mbps • 3% Dynamic EVM @ POUT = +20 dBm with IEEE 802.11g 64 QAM OFDM at 54 Mbps • -30 dBc 1st Sidelobe / -50 dBc 2nd Sidelobe

flyback smps 300w

Abstract: bjt 2n2222 driver circuit variac used as a battery charger 12v 50 A battery charger smps schematic flyback transformer philips TV 29 inch schematic smps 300W BCD60II L4990 L4990A SO16W
Contextual Info: L4990 L4990A  PRIMARY CONTROLLER CURRENT-MODE CONTROL PWM SWITCHING FREQUENCY UP TO 1MHz LOW START-UP CURRENT < 0.45mA HIGH-CURRENT OUTPUT DRIVE SUITABLE FOR POWER MOSFET 1A FULLY LATCHED PWM LOGIC WITH DOUBLE PULSE SUPPRESSION PROGRAMMABLE DUTY CYCLE

TDB O 117 SP

Abstract: 34 zbf Zbf 34 SCM7102-XC SCM7102-XC-W 21CFR1040
Contextual Info: Specification : TS-S98D004E Date : Mar , 2001 Technical Specification for Optical Transceiver Module SCM7102-XC SCM7102-GC 62 2.0 8M bps 15 5.5 2M bps other _ _ _ _ other _ _ _ _ Sh ort H au l Lo ng H au l Inte rm e diate R ea ch Lo ng R e ach

smd transistor M21

Abstract: smd M21 OC23 TMP87CH21 TMP87CH21BDF TMP87CH21BF TMP87CH21DF TMP87CH21F TMP87CM21DF TMP87CM21F
Contextual Info: TO SH IB A TMP87CH21/H21B/M21 CMOS 8 -Bit Microcontroller TMP87CH21F, TMP87CH21BF, TMP87CM21F TMP87CH21DF, TMP87CH21BDF, TMP87CM21DF The TMP87CH21/H21B/M21 are the high speed and high performance 8 -bit single chip microcomputers. These MCU contain, large ROM, RAM, input/output ports, LCD driver, 8 -bit AD converter, four multi-function

RBS 2116

Abstract: TMP87PM78F QFP100-P-1420-0 TLCS-870 TMP87CC78F TMP87CH78F TMP87CK78F TMP87CM78F 87cm78 P0748
Contextual Info: TOSHIBA TMP87CC78/H78/K78/M78 CMOS 8 -BIT MICROCONTROLLER TMP87CC78F, TMP87CH78F, TMP87CK78F, TMP87CM78F The 87CC78/H78/K78/M78 are the high speed and high performance 8 -bit single chip microcomputers. These MCU contain 8 -bit A/D conversion inputs and a VFT Vacuum Fluorescent Tube driver on a chip.

SCM7104-XC

Abstract: SCM7104-GC-GN SCM7104-GC-ZN ATIC 95
Contextual Info: Specification : TS-S98D008F Date : April, 2001 Technical Specification for 3.3V / 1.25Gbps Optical Transceiver Module SCM7104-XC SCM7104-GC 155.52Mbps 622.08Mbps 1.25Gbps other _ Short Haul Intermediate Reach Long Haul Long Reach other _

RBS 3518

Contextual Info: TOSHIBA TMP87CK37/M37 UNDER DEVELOPMENT CMOS 8-BIT MICROCONTROLLER TMP87CK37N, TMP87CM37N The 87CK37/M37 are the high speed and high performance 8-bit single chip microcomputers. These MCU contain CPU core, ROM, RAM, input/output ports, six multi-function timer/counters, serial bus interface, on­

46LR32640A

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR32640A 16M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32640A is 2,147,483,648 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 33,554,432 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

KT 0003B

Abstract: 88ch40 Transistor 6cr
Contextual Info: T O S H I B A TMP88CH40N/M data sheet tentativeness version 2002-12-03 R E V O . Note l) 1 This product is underdevelopment, and there is the case that specification / a function is changed without a notice. Note 2) This data sheet is tentativeness version, and there is a case

Contextual Info: DUAL CHANNEL T1/E1/J1 LONG HAUL/ SHORT HAUL LINE INTERFACE UNIT IDT82V2082 FEATURES: • • • • • • • - Dual channel T1/E1/J1 long haul/short haul line interfaces Supports HPS Hitless Protection Switching for 1+1 protection without external relays

IST13

Contextual Info: CR16MNS5, CR16MFS5, and CR16MPS5 are Obsolete Devices CR16MES5,CR16MES9,CR16MFS5,CR16MFS9, CR16MHS5,CR16MHS9,CR16MNS5,CR16MNS9, CR16MPS5,CR16MUS5,CR16MUS9 6MPS5/CR16MUS5/CR16MUS9 Family of CompactRISC 16-Bit Microcontrollers

46LR16640A

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR16640A Advanced Information 16M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16640A is 1,073,741,824 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 16,777,216 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

46LR32640A

Abstract: Mobile DDR SDRAM IS43LR32640A-5BLI IS46LR32640A-5BLA1 64Mx32 Mobile DDR SDRAM IS43LR32640A
Contextual Info: IS43/46LR32640A Advanced Information 16M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32640A is 2,147,483,648 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 33,554,432 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

46LR16320C

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR16320C Preliminary Information 8M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16320C is 536,870,912 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 8,388,608 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

446H

Abstract: 451H RDN11 GR-253-CORE GR-499-CORE IDT82P2821 640-Pin
Contextual Info: 21 +1 Channel High-Density T1/E1/J1 Line Interface Unit IDT82P2821 Version 3 February 6, 2009 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 1-800-345-7015 or 408-284-8200• TWX: 910-338-2070 • FAX: 408-284-2775 Printed in U.S.A.

BF484

Abstract: IDT82P20516 transformer e19 GR-253-CORE GR-499-CORE 82P20516 chn 347
Contextual Info: 16-Channel Short Haul E1 Line Interface Unit IDT82P20516 Version December 17, 2009 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 1-800-345-7015 or 408-284-8200• TWX: 910-338-2070 • FAX: 408-284-2775 Printed in U.S.A. 2009 Integrated Device Technology, Inc.

mip 2h2

Abstract: Solid state CCIR ca 152 sh ei 33ca RGB565 to rgb888 PMB 8888 660-227 331 dim hee nv tag 8514 SERVICE MANUAL tv sharp A205D
Contextual Info: Advance This document contains information on a product under development. Information is not warranted and is subject to change. Bt2166 High-Performance PCI/AGP 3D Video/Graphics Controller Applications Feature Summary • • • • • • • Microsoft Windows 95 Direct3D accelerator

package detail of IDT82V2081

Abstract: IDT82V2081 TQFP44 TQFP44 package
Contextual Info: SINGLE CHANNEL T1/E1/J1 LONG HAUL/ SHORT HAUL LINE INTERFACE UNIT IDT82V2081 FEATURES: • • • • • • • Single channel T1/E1/J1 long haul/short haul line interfaces Supports HPS Hitless Protection Switching for 1+1 protection without external relays

PH150F280-5

Abstract: anemometer haa-146 heatsink PH150F PH50S HAA-083 air cooled heatsink PH75F PH75S
Contextual Info: PH-SERIES Thermal Design 1. THERMAL DESIGN • STEP 1 To ensure proper operation of power module, Determine the required output power Pout it is necessary to keep baseplate temperature and ambient temperature (TJ. within the allowable temperature limit. The

Contextual Info: Advanc A ced Pow wer E Electron nics Co orp. AP PE1543 2M MHz, 3A Synchrronous Step Do own Converterr FEATUR RES Two 50m m DES SCRIPTIO ON typical MOSFETs M forr High The APE1543 A is a synchronou us step down n converter Efficiencyy at 3A Load ds designed with in