FPI BUS Search Results

27201

Abstract: CX27201 CX27201-1ETF CX27201-2ETF
Contextual Info: BIS Backplane Transceiver Products 1/30/2003 CX27201: 3.125 Gbps SerDes Transceiver with 8B/10B & FPI Last Time Buy Notice Mindspeed Technologies , A Conexant Business, is committed to providing its valued customers with cost-effective products that meet high quality standards. To ensure that commitment, Mindspeed from

MS-026

Abstract: ZL50012 philips e3 STO11 ci 116h 4094m
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection

MS-026

Abstract: ZL50012 TFPW0 sto8b
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection

DS5722

Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection

HN58C65PJ-25

Contextual Info: ADE-203-411A Z HN58C65PJ/FPI 8,192-word x 8-bit Electrically Erasable and Programmable CMOS ROM Rev. 1.0 June 20, 1995 HITACHI The Hitachi HN58C65 is an electrically erasable and programmable ROM organized as 8,192-word x 8 -b it. It r e a liz e s h ig h s p e e d , lo w p o w e r

GR-1244-CORE

Abstract: MS-026 ZL50011
Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features December 2003 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL

32.768Mhz oscillator

Abstract: FOX 20.000 MHZ GR-1244-CORE MS-026 ZL50011 tfk8
Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features December 2003 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL

GR-1244-CORE

Abstract: MS-026 ZL50011 11CH marking
Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features July 2004 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL

Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features July 2005 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL

ZL50012QCG1

Abstract: MS-026 ZL50012 STO10
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features • April 2006 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection

BC1211

Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features July 2005 • 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection

MS-026

Abstract: ZL50012
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features July 2004 • 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection

fpi bus

Contextual Info: Data Transfer between external and internal memory SP SRAM This CarmelNote is useful for system designers to make decision regarding the trade-off and the relation between external and internal memory. We will not discuss any cache-concepts or the detailed connection of external

PA2032

Abstract: fpi bus TRMD-030-L LED DIP2 82C54 LED10 PC16550 J10132 0x000030 ISA connector
Contextual Info: 2000-01-25 @ 14:54 CAREB Users Manual CARMEL Test and Evaluation Board V0.90 1999-12 Confidential Infineon Technologies Table of Contents Table of Contents Page 1 1.1 1.1.1 1.2 1.2.1 1.2.2 1.2.3 1.3 1.3.1 1.3.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ZL50017

Abstract: ZL50017GAC ZL50017QCC fpi 205
Contextual Info: ZL50017 1 K Digital Switch Data Sheet Features October 2004 • 1024 channel x 1024 channel non-blocking digital Time Division Multiplex TDM switch at 4.096, 8.192 or 16.384 Mbps • 16 serial TDM input, 16 serial TDM output streams • Output streams can be configured as bidirectional for connection to backplanes

Contextual Info: User’s Manual, V1.2, Feb. 2003 TC11IB Peripheral Units 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2003-02 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany Infineon Technologies AG 2003.

Contextual Info: User’s M anual, V1.1, Apr. 2002 TC11IB P e ri p h e ra l U n i t s 3 2 -B i t S i n g l e - C h i p M ic r o co n t ro l l e r M i c r o c o n t ro l le r s N e v e r s t o p t h i n k i n g . Edition 2002-04 Published by Infineon Technologies AG, St.-Martin-Strasse 53,

LQFP256

Abstract: ZL50017 ZL50017GAC ZL50017GAG2 ZL50017QCC
Contextual Info: ZL50017 1 K Digital Switch Data Sheet Features • November 2006 1024 channel x 1024 channel non-blocking digital Time Division Multiplex TDM switch at 4.096, 8.192 or 16.384 Mbps Ordering Information ZL50017GAC ZL50017QCC ZL50017QCG1 256 Ball PBGA 256 Lead LQFP

P-BGA-338

Abstract: AD-29B
Contextual Info: Dat a S hee t , V 1. 1, M ar 2 00 2 TC11IB 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2002-03 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany Infineon Technologies AG 1988.

P-BGA-388-2

Abstract: 15D1H
Contextual Info: Da ta She et, V2 .0, De c. 2 00 2 TC11IB 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2002-12 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany Infineon Technologies AG 2002.

Ps3 MOTHERBOARD CIRCUIT diagram

Abstract: PS3 computer motherboard circuit diagram DATA SHEET OF D400 transistor F880 TC11IB FPI 31 motorola make ECU MODULE power line carrier communication dc smd transistor AE3 transistor D400
Contextual Info: Data Sheet, V2.3, Nov. 2003 TC11IB 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2003-11 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany Infineon Technologies AG 2003.

Contextual Info: P r o d u c t O ve rv ie w, V 1 . 1 , J u n e 2 0 0 2 TC1920 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2002-06 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany Infineon Technologies AG 2002.

AP32009

Abstract: PCP2 TC17X
Contextual Info: Application Note, V3.0, Jul. 2008 AP32009 T C 1 7 x6 / T C 1 7 x7 Safe Cancellation of Service Requests Microcontrollers Edition 2008-07-15 Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2008. All Rights Reserved.

fpi bus

Abstract: tricore instruction set infineon tricore Tricore single bus master CPU DSP "saturation arithmetic" TA 8777
Contextual Info: MP System Licensing Program TriCore is an innovative, award-winning architectural solution unifying the best features of real-time microcontrollers, computational power of DSP and the price / performance benefits of a superscalar RISC. MCU Highlights TriCore’s modular system architecture facilitates the design of true system-on-chip