FREQUENCY GENERATOR 500MHZ Search Results

Contextual Info: PCS5I9658 November 2006 rev 0.3 3.3V 1:10 LVCMOS PLL Clock Generator Features and the reference clock frequency determines the VCO • 1:10 PLL based low-voltage clock generator frequency. Both must be selected to match the VCO • Supports zero-delay operation

Contextual Info: Integrated Circuit System s, Inc. ICS1523 High Performance Programmable Line-Locked Clock Generator General Description The ICS1523 is a low -cost but very high-perform ance frequency generator for line-locked and gen-locked highresolution video applications. U tilizing IC S’s advanced

Contextual Info: PI6C557-10 Network Clock Generator Product Features Description • 100MHz Differential Output, 33MHz LVCMOS The PI6C557-10 is an integrated 100MHz differential and 33MHz LVCMOS clock generator. It uses a 25MHz quartz crystal to provide an input frequency reference. The high performance internal PLL

SRX7278

Contextual Info: PI6C557-10 Network Clock Generator Product Features Description • 100MHz Differential Output, 33MHz LVCMOS The PI6C557-10 is an integrated 100MHz differential and 33MHz LVCMOS clock generator. It uses a 25MHz quartz crystal to provide an input frequency reference. The high performance internal PLL

IC 741 pin diagram

Abstract: pin out of 741 IC OF IC 741
Contextual Info: Advance Product Information . Low Jitter Clock Multiplier and Distributor VSC6108/10/12 Features • Recommended Companion for VSC6250 500MHz Deskew IC and Vitesse Timing Generator ICs • Input Clock Frequency: 50MHz to 622MHz • Output Clock Frequency: lOOMHzto 1.25GHz

Contextual Info: PCS5I9653A November 2006 rev 0.3 3.3V 1:8 LVCMOS PLL Clock Generator Features running at either 4x or 8x of the reference clock frequency. • 1:8 PLL based low-voltage clock generator The PCS5I9653A is guaranteed to lock in a low power PLL • Supports zero-delay operation

MAX3638

Abstract: t/51511d150/fw/a/xtal 5.06 2 pin crystal oscillator
Contextual Info: 19-4910; Rev 0; 10/09 TION KIT EVALUA BLE IL AVA A Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs The MAX3638 is a highly flexible, precision phaselocked loop PLL clock generator optimized for the next generation of network equipment that demands low-jitter

S1523

Contextual Info: Integrated Circuit System s, Inc. ICS1523 High-Performance Programmable Line-Locked Clock Generator General Description Features The IC S 1 5 2 3 is a low -cost but very high-perform ance frequency generator for line-locked and genlocked highresolution video applications. U tilizing IC S’s advanced

XRK69774

Abstract: XRK69774CR XRK69774IR
Contextual Info: XRK69774 PRELIMINARY 1:14 LVCMOS PLL CLOCK GENERATOR APRIL 2006 REV. P1.0.1 GENERAL DESCRIPTION to125MHz and an input frequency range of 4.16MHz to 62.5MHz. The XRK69774 is a PLL based LVCMOS Clock Generator targeted for high performance and low skew clock distribution applications. The XRK69774 can select between one

FS01

Abstract: ICS94206
Contextual Info: Integrated Circuit Systems, Inc. ICS94206 Programmable System Frequency Generator for PII/III Features: • Programmable ouput frequency. • Programmable ouput rise/fall time. • Programmable PCI_F and PCICLK skew. • Spread spectrum for EMI control typically by 7dB to

Programmable Divider

Abstract: 250M
Contextual Info: M18GPL22S Data Sheet Preliminary 1. General Description M18GPL22S is a fully integrated analog programmable frequency synthesizer based on a charge pump type PLL. The output frequency range of M18GPL22S is 125M ~ 500 MHz 2. Features • On-chip charge pump type PLL clock generator including loop filter

Contextual Info: PCS5I9350 November 2006 rev 0.3 3.3V 1:10 LVCMOS PLL Clock Generator Features The PCS5I9350 features Xtal and LVCMOS reference • Output frequency range: 25 MHz to 200 MHz clock inputs and provides nine outputs partitioned in four • Input frequency range: 6.25 MHz to 31.25 MHz

AVD33

Abstract: Programmable Divider 250M
Contextual Info: M18GPL21M Data Sheet Preliminary 1. General Description M18GPL21M is a fully integrated analog programmable frequency synthesizer based on a charge pump type PLL. The output frequency range of M18GPL21M is 250M ~ 700 MHz. 2. Features • On-chip charge pump type PLL clock generator including loop filter

ICS94209

Contextual Info: Integrated Circuit Systems, Inc. ICS94209 Programmable Frequency Generator & Integrated Buffers for Pentium III Processor Block Diagram 48MHz 24_48MHz /2 XTAL OSC PLL1 Spread Spectrum SDATA SCLK FS 3:0 PD# PCI_STOP# CPU_STOP# SDRAM_STOP# MODE AGP_SEL Control

Contextual Info: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer December 2005 Preliminary Data Sheet • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features

Contextual Info: HI5634 May 1999 PRELIMINARY High Performance Programmable Phase-Locked Loop for LCD Applications The HI5634 is a low cost but very high-performance frequency generator for line-locked and genlocked high resolution video applications. Utilizing an advanced low

ICS951901

Contextual Info: ICS951901 Integrated Circuit Systems, Inc. Programmable Frequency Generator & Integrated Buffers for Pentium III Processor Block Diagram 48MHz 24_48MHz /2 XTAL OSC PLL1 Spread Spectrum SDATA SCLK FS 3:0 PD# PCI_STOP# CPU_STOP# SDRAM_STOP# MODE AGP_SEL 0670B—07/15/04

HI5634

Abstract: HI5634CB JESD8-8
Contextual Info: HI5634 Data Sheet PRELIMINARY May 1999 High Performance Programmable Phase-Locked Loop for LCD Applications The HI5634 is a low cost but very high-performance frequency generator for line-locked and genlocked high resolution video applications. Utilizing an advanced low

LVCMOS25

Abstract: LVCMOS33 CLK5610
Contextual Info: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer March 2007 Data Sheet DS1019 • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features ■ ■

LVCMOS25

Abstract: LVCMOS33 TQFP100 ISPPAC-CLK552
Contextual Info: ispClock 5500 Family In-System Programmable Clock Generator with Universal Fan-Out Buffer August 2004 Data Sheet • Up to Five Clock Frequency Domains ■ Flexible Clock Reference Inputs Features ■ ■ ■ ■ 10MHz to 320MHz Input/Output Operation

Contextual Info: ispClock 5500 Family In-System Programmable Clock Generator with Universal Fan-Out Buffer February 2005 Data Sheet • Up to Five Clock Frequency Domains ■ Flexible Clock Reference Inputs Features ■ ■ ■ ■ 10MHz to 320MHz Input/Output Operation

ISPPAC-CLK5610AV-01TN48I

Abstract: ISPCLOCK5600A LVCMOS25 LVCMOS33 ispPAC-CLK5610AV-01T48C
Contextual Info: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer June 2008 Data Sheet DS1019 • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features ■ ■

1523m

Abstract: MAN09 ICS1523 1523MLFT
Contextual Info: ICS1523 Video Clock Synthesizer with I2C Programmable Delay General Description Features The ICS1523 is a low-cost, high-performance frequency generator. It is well suited to general purpose phase controlled clock synthesis as well as line-locked and genlocked high-resolution video

ICS94203

Abstract: SEL24
Contextual Info: Integrated Circuit Systems, Inc. ICS94203 Programmable System Frequency Generator for PII/III Pin Configuration Output Features: • 2 - CPUs @ 2.5V • 13 - SDRAM @ 3.3V • 3 - 3V66 @ 3.3V • 7 - PCI @3.3V • 1 - 24/48MHz@ 3.3V • 1 - 48MHz @ 3.3V fixed