FULL SUBTRACTOR Search Results

9304 "pin compatible"

Abstract: 9304 S2845 4 bit binary full adder and subtractor Adder 9304 Dual 1-Bit with Carry ScansUX980 a9304 9304 fairchild
Contextual Info: 9304 MSI DUAL FULL ADDER A FAIRCHILD COMPATIBLE CURRENT SINKING LOGIC PRODUCT GENERAL DESCRIPTION — The 9304 consists of two independent, high speed, binary full adders. The adders are useful in a wide variety of applications including multiple bit parallel

AD395JD

Abstract: IC 74LS244 LATCH APPLICATIONS AD395
Contextual Info: ANALOG DEVICES □ FEATURES Four Com plete 12-Bit CMOS DACs w ith Buffer Registers Linearity Error ±1/2LSB Tmin-Tmax AD394, AD395K,T Factory-Trimmed Gain and Offset Precision O utput Amplifiers for V 0 u t Full Four Quadrant M ultiplication per DAC M onotonicity Guaranteed Over Full Temperature

AD396TD

Abstract: AD396
Contextual Info: ANALOG DEVICES □ FE A T U R ES Four, Pre-Trimmed, 14-Bit C M O S D A C s Double Buffered for Sim ultaneous Update Precision Output Amplifiers for Voltage Out Full Four Quadrant Multiplication - Independently Pinned Out D A C Reference Monotonicity Guaranteed Over Full M IL Temp. Range

AD3958

Abstract: 74ls139 decoder Analog Devices Catalog DAC
Contextual Info: ANALOG DEVICES □ FEATURES Four Com plete 12-Bit CMOS DACs w ith Buffer Registers Linearity Error ± 1/2LSB Tmin-Tmax AD394, AD395K,T Factory-Trimmed Gain and Offset Precision O utput Amplifiers for V 0 u t Full Four Q uadrant Multiplication per DAC M onotonicity Guaranteed Over Full Tem perature

FULL SUBTRACTOR using 41 MUX

Abstract: ALU of 4 bit adder and subtractor "Overflow detection"
Contextual Info: PDSP16318/16318A PDSP16318/PDSP16318A Advance Information Complex Accumulator Advance Information DS3708 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz

DS3708

Abstract: PDSP16112 PDSP16112A PDSP16318 FULL SUBTRACTOR using 41 MUX asi mux ALU of 4 bit adder and subtractor "Overflow detection" TTL ALU of 4 bit adder and subtractor CMOS Full Adder
Contextual Info: PDSP16318/16318A PDSP16318/PDSP16318A Advance Information Complex Accumulator Advance Information DS3708 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz

"Overflow detection"

Abstract: FULL SUBTRACTOR using 41 MUX
Contextual Info: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.

FULL SUBTRACTOR using 41 MUX

Abstract: "Overflow detection"
Contextual Info: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.

FULL SUBTRACTOR using 41 MUX

Abstract: PDSP16112 ALU of 4 bit adder and subtractor GC100 PDSP16112A PDSP16318 "Overflow detection"
Contextual Info: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.

FULL SUBTRACTOR using 41 MUX

Abstract: PDSP16112 GC100 PDSP16112A PDSP16318 "Overflow detection"
Contextual Info: PDSP16318 MC PDSP16318 MC Complex Accumulator Supersedes April 1993 version, DS3761 - 1.2 DS3761 - 2.1 November 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz

Contextual Info: M MOTOROLA Military 10687 High Speed 2 x 1 Bit Array Multiplier Block ELECTRICALLY TESTED PER: MPG 10687 The 10687 is a dual high speed interactive multiplier. It is designed for use as an array multiplier block. Each device is a modified full adder/subtractor that

C1-D18

Abstract: CQFP 208
Contextual Info: I Features I I I I I ACT5260 64-Bit Superscaler Microprocessor . • High-perform ance floating point unit ■ Full militarized QED RM5260 microprocessor ■ Dual Issue superscalar QED RISCMark

7000SC

Abstract: 17-FP
Contextual Info: Standard Products ACT 7000SC 64-Bit Superscaler Microprocessor June 16, 2004 FEATURES • ■ Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance

Contextual Info: W tflGEC PLESSEY P R E L IM IN A R Y IN F O R M A T IO N DS3708 - 2.0 PDSP16318/PDSP16318A COMPLEX ACCUMULATOR The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz

Contextual Info: Standard Products ACT 7000ASC 64-Bit Superscaler Microprocessor January 24, 2005 FEATURES • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance

ACT7000ASC

Contextual Info: ACT-7000ASC 64-Bit Superscaler Microprocessor Features • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance ● ● ■ ● ● ●

7000SC

Abstract: Tag 225 600 replacement SCD7000 R5000 mips R4650 RM5261 RM7000 7000sc210f17 CQFP 240 Aeroflex
Contextual Info: Standard Products ACT 7000SC 64-Bit Superscaler Microprocessor www.aeroflex.com/Avionics October 9, 2009 FEATURES • ■ Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance

implementing ALU with adder/subtractor

Abstract: ACT5230 ACT-5230PC-133F22I R4000 R4700 R5000 register file RM5230
Contextual Info: ACT5230 32-Bit Superscaler Microprocessor Features • ■ Full militarized QED RM5230 microprocessor Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle ■ High-performance floating point unit ● Single

Contextual Info: M IT E L PDSP16318 MC SE M IC O N D U C T O R Complex Accumulator DS3761 - 2.1 Supersedes April 1993 version, DS3761 - 1.2 Novem ber 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz

AD396

Abstract: sine multiplier AD396JD synchro to digital converter csi
Contextual Info: ► ANALOG DEVICES |iP Compatible Multiplying Quad 14-Bit D/A Converter AD396 FEATURES Four, Pre-Trimmed, 14-Bit CMOS DACs Double Buffered for Simultaneous Update Precision Output Amplifiers for Voltage Out Full Four Quadrant Multiplication - Independently

CQFP 208

Abstract: rm5260
Contextual Info: Standard Products ACT 5260 64-Bit Superscaler Microprocessor www.aeroflex.com/Avionics January 28, 2004 FEATURES ❑ ❑ Full militarized PMC-Sierra RM5260 microprocessor Dual Issue superscalar PMC-Sierra RISCMark can issue one integer and one floating-point

RM5260

Abstract: CQFP 208
Contextual Info: ACT5260 64-Bit Superscaler Microprocessor Features • ■ ■ ■ Full militarized QED RM5260 microprocessor Dual Issue superscalar QED RISCMark - can issue one integer and one floating-point instruction per cycle microprocessor - can issue one integer and one

CQFP 208 datasheet

Abstract: ACT5260 R4000 R4700 R5000
Contextual Info: ACT5260 64-Bit Superscaler Microprocessor Features • ■ ■ ■ Full militarized QED RM5260 microprocessor Dual Issue superscalar QED RISCMark - can issue one integer and one floating-point instruction per cycle microprocessor - can issue one integer and one

ACT5271

Abstract: R4700 R5000 RM5261 RM5271 RM7000
Contextual Info: ACT5271 64-Bit Superscaler Microprocessor Features • ■ Full militarized QED RM5271 microprocessor Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle ■ ● Single cycle repeat rate for common single precision operations