GEO SEMICONDUCTOR Search Results

AR0331

Abstract: aptina sensor Aptina SXW2 RS-232C dip aptina display 1080p60 video encoder Encoder video to HDMI ic AR033 capture HDMI video IC usb
Contextual Info: GEO Semiconductor Inc. GEO - Janus GEO Semiconductor – Aptina Joint Reference Design for Fish Eye Cameras Featuring GEO’s AnyVIEWTM Technology The Janus is a full-fledged camera reference design targeted at security and surveillance applications. Featuring the AR0331 high dynamic range sensor and Image Co-Processor ICP-HD,

GW3300

Contextual Info: GEO Semiconductor Inc. GW3300 Programmable Geometric Processor General Description The GW3300 integrates GEO’s patented eWARP core with a Tensilica® Xtensa CPU and DDR3 interface, providing a powerful platform for addressing complex video applications.

GW3400

Abstract: GW340
Contextual Info: GEO Semiconductor Inc. GW3400 Programmable Geometric Processor and ISP General Description The GW3400 integrates GEO’s patented eWARP core with an Apical Image Signal Processor ISP , Tensilica® Xtensa CPU, DDR3 interface, parallel and MIPI interfaces, providing a complete integrated camera system solution.

SAA7119E

Abstract: SEMICONDUCTOR KIT SAA7119 SiI164 SII164DVI ethernet development board ca ADV7402
Contextual Info: Geo Semiconductor Inc. Niobe Evaluation Board for Realta - Video Processing IC The Geo Semiconductor Niobe Evaluation Board is a high performance reference platform for the Realta image processor. The purpose of this platform is to allow system developers and software engineers to evaluate the image quality of the Realta HQV

array processor

Abstract: SXT2-200
Contextual Info: GEO Semiconductor Inc. Realta Advanced Image Processor IC HQV Image Quality and Software Processor for Advanced Displays Key Features HQV image processing • HQV true HD 1080i to 1080p four-field de-interlacing • HQV HD/SD multi-directional diagonal filtering MDDF

sii7172

Abstract: SiI1178 DVI dual link transmitter SiI7181 block diagram of dual 12v power supply SXW2 2560x1600 AD9984A Sii7181 iTMDS 2048x1080
Contextual Info: Geo Semiconductor Inc. Shasta Dual sxW2 Evaluation Board BLOCK DIAGRAM sxW2 1 Primary DDR Power Supply DDR 5.0V misc 3.3V IO 1.8V DDR2 1.2V core Flash 12V IN 30-bit SiI1178 (2) Dual Link DVI transmitter Dual link DVI output connector 30-bit SiI7172 iTMDS

720p30

Abstract: MAX64180 H.264 encoder arm doorbells MAX64180CXO impulse noise filter h.264 codec ARM9 AES
Contextual Info: GEO Semiconductor Inc. MAX64180 Compact 720p30 HD H.264 Compression SoC for Cameras General Description The MAX64180 is a fully integrated HD camera SoC that combines high-performance audio/video subsystems with H.264 compression, an ARM processor for system functions, AES/SHA accelerators

CS5324-BL

Abstract: S5324
Contextual Info: m mm i CS5324 Semiconductor Corporation 120 dB, 500 Hz Oversampling A/D Converter Features General Description The CS5324 analog to digital converter is a unique, very high resolution A/D converter intended for geo­ physical and sonar applications. It is a complete analog

MG2580A3-376B

Abstract: MG2580 MG258 H.264 encoder ethernet h.264 Codec I2S bridge graphics controller 1280x720 ARM9 processor I2S usb bridge
Contextual Info: GEO Semiconductor Inc. MG2580 720p30 H.264 Compression SoC General Description The MG2580 is a highly integrated, low-power, HD H.264 SoC ideal for today's consumer and security markets. It offers a fully compliant baseline, main, and high-profile HD H.264 codec, MJPEG codec, HD

MG3500A3-376B

Abstract: MG3500 MG3500A3376B H.264 encoder ethernet I2S usb bridge H.264 codec 376-PIN audio codec i2s usb impulse noise filter MG3500A3-376
Contextual Info: GEO Semiconductor Inc. MG3500 Multichannel 1080p30 H.264 Compression SoC General Description The MG3500 is a highly integrated, multichannel, low-power, HD H.264 SoC ideal for today's consumer and security markets. It offers a fully compliant baseline, main, and high-profile HD H.264 codec, MJPEG codec, HD MPEG2

2n4260

Contextual Info: 2N4260 Chip: geometry 0014; polarity PNP 4.99 Transistors UHF/Micr. 1 of 1 Home Part Number: 2N4260 Online Store 2N4260 Diodes C hip: geo m et ry 0 0 1 4 ; po larit y PNP Transistors Enter code INTER3 at

MAX64380

Abstract: MAX64380CXU 1080p video encoder MAX6438 USB TO VIDEO 233pin 720p30 1080P30 1080p30 video processor 233-PIN
Contextual Info: GEO Semiconductor Inc. MAX64380 1080p30 H.264 Camera CODEC with High Dynamic Range ISP General Description The MAX64380 is a powerful H.264 CODEC that supports encoding of video up to High Definition HD 1080p resolution. The device incorporates an ISP, HD H.264 encoder, JPEG codec, video preprocessors, and a number of

2N2368

Contextual Info: 2N2368 Chip: geometry 0005; polarity NPN 0.90 Transistors UHF/Micr. 1 of 1 Home Part Number: 2N2368 Online Store 2N2368 Diodes C hip: geo m et ry 0 0 0 5 ; po larit y NPN Transistors Enter code INTER3 at

Contextual Info: Revision 16 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)

RTAX2000

Abstract: RTAX2000S RTAX1000SL rtax250 RTAX250SL RTAX4000SL RTAX1000 RTAX-S RTAX1000S-SL rtax250s
Contextual Info: Rev ision 13 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)

w32 smd transistor

Abstract: rtax250sl RTAX2000S w32 smd transistor 143 41-bit Carry Look-ahead Adder RTAX2000SL RTAX4000S BY415 RTAX4000D LG1152
Contextual Info: Revision 14 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)

RTAX2000D

Abstract: LG1152 CDB 455 C34
Contextual Info: Revision 14 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)

624 CCGA

Abstract: CQ352 transistor prc 606 j rtax250 RTAX2000 rtax4000
Contextual Info: Revision 14 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)

CI R-Y 1028

Abstract: a gn 137
Contextual Info: Advanced v0.2  RTAX-S Family FPGAs Sp e ci a l F ea t ur es f o r Sp a ce • Up to 10,752 SEU Hardened Flip-Flops Eliminate Software TMR Necessity >LET th 37 LET, GEO SEU Rate <10-10 Errors/Bit-Day • Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with

RTAX2000

Abstract: IDTQS32X2384 352-Pin
Contextual Info: Advanced v0.1  RTAX-S Family FPGAs Sp e ci a l F ea t ur es f o r Sp a ce • Up to 10,752 SEU Hardened Flip-Flops Eliminate Software TMR Necessity >LET th 37 LET, GEO SEU Rate <10-10 Errors/Bit-Day • Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with

624 CCGA

Abstract: RTAX2000 TBD 234 V12 CQFP verilog hdl code for triple modular redundancy
Contextual Info: Advanced v0.4 RTAX-S Family FPGAs Special Features for Space • • • • • • • • • • • Up to 10,752 SEU Hardened Flip-Flops Eliminate Software TMR Necessity >LET th 37 LET, GEO SEU Rate <10-10 Errors/Bit-Day Expected SRAM Upset Rate of <10-10 Errors/Bit-Day

Contextual Info: Advanced v0.3  RTAX-S Family FPGAs Sp e ci a l F ea t ur es f o r Sp a ce • Up to 10,752 SEU Hardened Flip-Flops Eliminate Software TMR Necessity >LET th 37 LET, GEO SEU Rate <10-10 Errors/Bit-Day • Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with

LA3805

Abstract: LA3365 LA3821 LA3361 FM multiplex Stereo Demodulator la3335 la3370 UJ12 fm mpx demodulator LA3401
Contextual Info: SANYO SEMICONDUCTOR CORP b3E D 7 ^ 7 0 7 ^ • G012047 774 ITSAJ F M M U L T IP L E X STEREO D E M O D U LA TO R : U n d e r D e v e lo p m e n t Type No. P ackage • p’osc Amp : >8 S uitable P ilo t Car-cei <§> : S S Sfste HOC M o s t S uita ble C han geo ver

Contextual Info: R E V I S I O N S LTR DESCRIPTION E.C.N. DATE A R ELEASE TO DOCUMENT CONTROL T I T L E : LOFP WAS PO F P; UPDATE NOTE 3 ; ADD GEO METRIC TOLERANCE 10710 1 1/22 /1 9 94 D EG/HJK 12317 1 1/10 /1 9 99 T L /R W B BY/APP'D 26+0.25 TYP 1 1-13 TOP & BOTTOM MIN RO.08-0.20