GPX09039 Search Results

P-TSOPII-54

Abstract: caz smd PC133 registered reference design
Contextual Info: HYB 39S64400/800/160ET L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM Preliminary Datasheet • Automatic and Controlled Precharge Command • High Performance: -7 -7.5 -8 Units fCKMAX 143 133 125 MHz tCK3 7 7.5 8 ns tAC3 5.4 5.4 6 ns tCK2 7.5 10 10

SMD MARKING T20

Abstract: smd marking T22 MARKING A3 SMD MARKING CODE a09
Contextual Info: HYB 39S64400/800CT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • High Performance: • Full page (optional) for sequential wrap around • Multiple Burst Read with Single Write Operation -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns • Automatic and Controlled Precharge

P-TSOPII-54

Abstract: PC133 registered reference design
Contextual Info: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • High Performance: • Multiple Burst Read with Single Write Operation -7 -7.5 -8 Units fCK 143 133 125 MHz • Automatic and Controlled Precharge Command tCK3 7 7.5 8 ns • Data Mask for Read/Write Control (x4, x8)

marking code EY SMD

Abstract: PC100-222-620 P-TSOPII-54
Contextual Info: HYB39L256160AC/T 256MBit 3.3V Mobile-RAM 256 MBit Synchronous Low-Power DRAM Data Sheet Revision Dec. 2002 • Automatic and Controlled Precharge Command Features -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and full page tCK3,MIN

39S256160DT-7

Abstract: HYB39S256400D PC133-222-520 PC166
Contextual Info: Data Sheet, Rev. 1.02, Feb. 2004 HYB39S256400D[C/T] L HYB39S256800D[C/T](L) HYB39S256160D[C/T](L) 256-MBit Synchronous DRAM SDRAM Memory Products N e v e r s t o p t h i n k i n g . Edition 2004-02 Published by Infineon Technologies AG, St.-Martin-Strasse 53,

smd marking T22

Abstract: smd transistor marking ba 128M-BIT P-TSOPII-54 P-TSOP-54 PC133 registered reference design 128-MBIT
Contextual Info: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: -7 -7.5 -8 Units • Automatic and Controlled Precharge Command fCK 143 133 125 MHz • Data Mask for Read/Write Control (x4, x8)

P-TSOPII-54

Abstract: 39S64160BT-7 39S64160AT-5
Contextual Info: HYB39S64160A/BT-5.5/-6/-7 64MBit Synchronous DRAM 4M x 16 MBit Synchronous DRAM for High Speed Graphics Applications • High Performance: • full page optional for sequencial wrap around • Multiple Burst Read with Single Write Operation • Automatic

PC100-322-620

Abstract: PC-100-322-620 PC133-333-520 PC100-222-620 P-TSOPII-54 39S256400AT-8A SMD MARKING CODE t15
Contextual Info: HYB 39S256400/800/160AT 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM Preliminary Datasheet • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125

SMD MARKING CODE aO9

Contextual Info: H YB39S64400/800/160BT L 64MBit Synchronous DRAM îlfîîl0Oil 64 M Bit S ynch ro n o u s DRAM • High Perform ance: M ultiple Burst Operation 7.5 -8 -10 Units fCKmax. 133 125 100 M Hz tC K 3 7.5 8 10 ns tA C 3 5.4 6 7 ns tC K 2 10 10 15 ns tA C 2 6 6 8

PC133-333

Abstract: P-TSOPII-54 hyb39s64400
Contextual Info: HYB39S64400/800/160A/BT L 64MBit Synchronous DRAM Ultra High Speed 64 MBit Synchronous DRAM PC143 & PC133 • High Performance: -7 -7.5 Units fCKmax. 143 133 MHz tCK3 7 7.5 ns tAC3 5.4 5.4 ns tCK2 10 10 ns tAC2 5.5 6 ns • Fully Synchronous to Positive Clock Edge

39S256160T

Abstract: PC100-322-620 smd CAY PC100-322 P-TSOPII-54
Contextual Info: HYB39S256400/800/160T 256MBit Synchronous DRAM 256 MBit Synchronous DRAM Preliminary Information • High Performance: -8 -8A -8B Units fCK 125 125 100 MHz tCK3 8 8 10 ns tAC3 6 6 6 ns tCK2 10 12 15 ns tAC2 6 6 7 ns • Fully Synchronous to Positive Clock Edge

cbx smd code

Abstract: SMD marking code ax2 PC100-222 PC133-333 P-TSOPII-54 smd marking T22
Contextual Info: HYB 39S64400/800CT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • High Performance: • Full page (optional) for sequential wrap around • Multiple Burst Read with Single Write Operation -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns • Automatic and Controlled Precharge

ISO 2768-mk

Abstract: PC100-222-620 HYB 39L128160AC-7.5
Contextual Info: HYB 39L128160AC/T 128-MBit 3.3V Mobile-RAM 128-MBit Synchronous Low-Power DRAM Datasheet Rev. 12/01 • Automatic and Controlled Precharge Command High Performance: -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and full page

P-TSOPII-54

Abstract: PC133 registered reference design
Contextual Info: HYB39S512400/800/160AT L 512MBit Synchronous DRAM 512 MBit Synchronous DRAM Preliminary Datasheet April ’01 • High Performance: -6 -7 -7.5 -8 Units fCK 166 143 133 125 MHz tCK3 6 7 7.5 8 ns tAC3 5 5.4 5.4 6 ns tCK2 7.5 7.5 10 10 ns tAC2 5.4 5.4 6 6 ns

Contextual Info: HYB39S64160ET-5/-5.5/-6 64MBit Synchronous DRAM 4M x 16 MBit Synchronous DRAM for High Speed Graphics Applications Preliminary Datasheet • High Performance: • Automatic Command and Controlled Precharge • Data Mask for Read / Write control -5 -5.5 -6

Contextual Info: # H YB39S256400/800/160T 256MBit Synchronous DRAM In fin eon 256 MBit Synchronous DRAM Preliminary Information • High Performance: Multiple Burst Operation -8 -8A -8B Units fC K 125 125 100 M Hz tC K 3 8 8 10 ns tA C 3 6 6 6 ns tC K 2 10 12 15 ns tA C 2

PC100-322-620

Abstract: 39S256 PC133 registered reference design HYB 39S256400CT-7.5 PC-100-322-620
Contextual Info: HYB39S256400/800/160CT L 256MBit Synchronous DRAM 256 MBit Synchronous DRAM • High Performance: -7.5 -8 -8A Units fCK 133 125 125 MHz tCK3 7.5 8 8 ns tAC3 5.4 6 6 ns tCK2 10 10 12 ns tAC2 6 6 6 ns • Fully Synchronous to Positive Clock Edge • 0 to 70 °C operating temperature

PC133 registered reference design

Contextual Info: HYB39S256400/800/160DT L 256MBit Synchronous DRAM 256 MBit Synchronous DRAM Preliminary Datasheet (Rev. 7/01) • High Performance: -6 -7 -7.5 -8 Units fCK 166 143 133 125 MHz tCK3 6 7 7.5 8 ns tAC3 5 5.4 5.4 6 ns tCK2 7.5 7.5 10 10 ns tAC2 5.4 5.4 6 6 ns

smd marking code bs

Abstract: TSOP RECEIVER 39S64160BT-8 MARKING AX5 sdram 4 bank 4096 16 smd code marking t6 P-TSOPII-54
Contextual Info: HYB39S64400/800/160BT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: 7.5 -8 -10 Units fCKmax. 133 125 100 MHz tCK3 7.5 8 10 ns tAC3 5.4 6 7 ns tCK2 10 10 15 ns tAC2 6 6 8 ns • Fully Synchronous to Positive Clock Edge • 0 to 70 °C operating temperature

P-TSOPII-54

Abstract: Q67100-Q1838 Q67100-Q2781
Contextual Info: HYB 39S64400/800/160BT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns tAC3 5.4 6 ns

P-TSOPII-54

Contextual Info: HYB 39S128400/800/160DT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM Preliminary Target Specification 10.01 High Performance: • Multiple Burst Read with Single Write Operation -6 -7 -7.5 -8 Units fCK 166 143 133 125 MHz • Automatic and Controlled Precharge

tube az1

Abstract: smd CAY smd marking T22 smd transistor at t21 PC100-322-620 MARKING AX5 by1 SMD marking RBY transistor smd marking mx transistor SMD t15
Contextual Info: HYB 39S256400/800/160T 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125 100 MHz tCK3 7.5 8 8 10

HYB39S64160ET

Abstract: P-TSOPII-54
Contextual Info: HYB39S64160ET-5/-5.5/-6 64MBit Synchronous DRAM 4M x 16 MBit Synchronous DRAM for High Speed Graphics Applications Preliminary Datasheet • High Performance: • Automatic Command and Controlled Precharge • Data Mask for Read / Write control -5 -5.5 -6

PC100-222-620

Abstract: PC133-333-520 P-TSOPII-54 pc100-322-620 SMD MARKING CODE M3
Contextual Info: HYB 39S256400/800/160AT 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125 100 MHz tCK3 7.5 8 8