HA 1100 SOIC Search Results

ali m 3329

Abstract: ali 3329 e 3329 ali ali 3329
Contextual Info: fax id: 3521 CY2907 General Purpose Clock Synthesizer Features • Available in 8-pin or 14-pin SOIC packages • 3.3V or 5.0V operation Highly configurable single PLL clock synthesizer pro­ vides all clocking requirements for numerous applica­ tions Compatible with all industry standard 9107 and 9108

D8011A

Contextual Info: 300 MHz, 1 mA Current Feedback Amplifier AD8011* ANALOG DEVICES □ FE A TU R ES FU N C T IO N A L BI.O C K DIA G R A M Easy to Use L o w P o w er 8-P in P lastic M in i-D IP and SOIC 1 m A P o w e r S u p p ly C u rre n t 5 m W on +5 V s • H ig h S p e e d a nd Fast S e ttlin g on +5 V

UDN6118

Abstract: UDN6118A UDN6118LW
Contextual Info: FLUORESCENT DISPLAY DRIVERS UDN6118LW Consisting of eight NPN Darlington output stages and the associ­ ated common-emitter input stages, these drivers are designed to interface between low-level digital logic and vacuum fluorescent displays. All devices are capable of driving the digits and/or segments

Contextual Info: FLUORESCENT DISPLAY DRIVERS UDN6118LW Consisting of eight NPN Darlington output stages and the associ­ ated common-emitter input stages, these drivers are designed to interface between low-level digital logic and vacuum fluorescent displays. All devices are capable of driving the digits and/or segments

HA 1100 soic

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview Phase-Frequency Detector The MC100LVEL40 is a phase/frequency detector intended for phase-locked loop applications which require a minimum amount of phase and frequency difference at lock. The device is a basic three state

el34s

Abstract: el34 SY100EL34 SY100EL34ZC SY10EL34 SY10EL34ZC
Contextual Info: Clockworks ADVANCE INFORMATION SY10EL34 S Y100 EL34 CLOCK GENERATION CHIP - 2 , ^4, ^8 SYNERG Y SEM IC O N D UC TO R DESCRIPTION FEATURES 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization Internal 75 K & input pull-down resistors

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA h-2/4, 4/6 Clock G eneration Chip MC100LVEL39 M C100EL39 The MC100LVEL39 is a low skew +2/4, +4/6 clock generation chip designed explicitly for low skew clock generation applications. The M C 100EL39 is pin and functionally equivalent to the M C 100LVEL39 but

Contextual Info: D S 1710 DALLAS SEMICONDUCTOR PIN ASSIGNM ENT • Converts CMOS RAMs into nonvolatile memories 15 □ • SOIC version is pin compatible with the Dallas Semi­ conductor DS1210S and DS1610S NV Controllers V bati Ax c 3 14 □ Az c 4 13 □ W EO Ay c 5 12 □

100LVEL39

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA •*■2/4, 4/6 Clock Generation Chip MC100LVEL39 M C100EL39 The M C100LVEL39 is a low skew +2/4, +4/6 clock generation chip designed explicitly for low skew clock generation applications. The M C100EL39 is pin and functionally equivalent to the M C 100LVEL39 but

Contextual Info: Clockworks ADVANCE INFORMATION SY10EL34 SY100EL34 - 2 , ^4, ^ 8 CLOCK SYNERGY GENERATION CHIP SEMICONDUCTOR DESCRIPTION FEATURES 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization Internal 75Ki2 input pull-down resistors

Contextual Info: Clockworks ADVANCE INFORMATION SY10/100EL34 -2, -5-4, +8 CLOCK GENERATION CHIP SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization Internal 75 KD input pull-down resistors ESD protection of 2000V

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA h-2, -4 , ^8 C lock G eneration Chip M C10EL34 M C100EL34 The MC10/100EL34 is a low skew +2, +4, -¡8 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common

Contextual Info: 6116 6118 AND FLUOBESCENT D ISPLAY D RIVERS Consisting of six or eight NPN Darlington output stages and the associated common-emitter input stages, these drivers are designed to interface between low-level digital logic and vacuum fluorescent displays. All devices are capable of driving the digits and/or segments

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA h-2, 4, 8 Clock Generation Chip MC10EL34 MC100EL34 The M C 10/100EL34 is a low skew +2, +4, +8 clock generation chip designed explicitly tor low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the com m on

Contextual Info: DS1710 PRO DUCT PREVIEW DALLAS SEMICONDUCTOR DS1710 Partitioned NV Controller FEATURES PIN ASSIGNMENT • Converts CMOS RAMs into nonvolatile memories Aw • Automatically selects +3,0V or +5.0V operation c V cco c • SOIC version is pin compatible with the Dallas Semi­

UDN6118A-2

Abstract: UDN6118A UDN6118A-1 UDN-6118A-2 UDN6116A UDN6118 UDN6118LW UDN-6118A UDN6118A1 UDN6118A* circuit
Contextual Info: ALLEGRO MICROSYSTEMS INC blE D • GSDi|33fl DDDbDtT G21 ■ AL6R 6116 AND Eifck&kgÆgJ 6118 FLU O R ESCEN T D ISPLAY DRIVERS Consisting of six or eight NPN Darlington output stages and the associated common-emitter input stages, these drivers are designed

Contextual Info: DS1610 DALLAS SEMICONDUCTOR FEATURES DS1610 Partitioned NV Controller PIN ASSIGNMENT • Converts CMOS RAMs into nonvolatile memories 2 15 3 Wo 3 Veci ^ Aw C • SOIC version is pin compatible with the Dallas Semi­ conductor DS1210 NV Controller V cco C • Unconditionally write protects all of memory when Vcc

Contextual Info: DALLAS DS1610 Partitioned NV Controller s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • Converts CMOS RAMs into nonvolatile m emories Aw < o o o • SOIC version is pin com patible with the Dallas Sem i­ conductor DS1210 NV Controller AX • Unconditionally write protects all of m em ory when Vcc

HA 1100 soic

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2.5GHz Low Power Prescaler With Stand-By Mode MC12095 The MC12095 is a single modulus prescaler for low power frequency division of a 2.5GHz high frequency input signal. Motorola’s advanced MOSAIC V technology is utilized to acheive low power dissipation of

Contextual Info: DS1710 P R O D U C T P R E V IE W DALLAS DS1710 Partitioned NV Controller s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • Converts CM OS RAMs into nonvolatile m emories • Autom atically selects +3.0V or +5.0V operation • SOIC version is pin com patible with the Dallas Sem i­

Contextual Info: * M . - 2 / 3 OR -5-2, +4/6) CLOCK GENERATION CHIP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES • 50ps output-to-output skew ■ Synchronous enable/disable ■ Master Reset for synchronization ■ Internal 75Ki2 input pull-down resistors ■ ESD protection of 2000V

MA 6116A

Contextual Info: 6116 6118 VND FLUORESCENT D ISPLAY DRIVERS Consisting of six or eight NPN Darlington output stages and the associated common-emitter input stages, these drivers are designed to interface between low-level digital logic and vacuum fluorescent displays. All devices are capable of driving the digits and/or segments

Contextual Info: FLUORESCENT DISPLAY DRIVERS Consisting of eight NPN Darlington output stages and the associ­ ated common-emitter input stages, these drivers are designed to interface between low-level digital logic and vacuum fluorescent displays. Both devices are capable of driving the digits and/or seg­

DS1210

Abstract: DS161 DS1610
Contextual Info: DS1610 DALLAS SEMICONDUCTOR D S 1610 Partitioned NV Controller FEATURES PIN ASSIGNMENT • SOIC version is pin compatible with the Dallas Semi­ conductor DS1210 NV Controller • Unconditionally write protects all of memory when Vcc is out of tolerance Aw