HI8482CT Search Results

DS8482

Abstract: HI-8482 raytheon analog 8 pin dip
Contextual Info: June 2000 GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS device designed as a dual differential line receiver in accordance with the requirements of the ARINC 429 bus specification. The device translates incoming ARINC 429 signals to normal CMOS/TTL levels on each of its two independent receive channels. The HI-8482 is also functionally equivalent to the Fairchild/Raytheon RM3183.

CERAMIC LEADLESS CHIP CARRIER package

Abstract: HI-8482 HI-8482CM DS8482
Contextual Info: January 2001 GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS device designed as a dual differential line receiver in accordance with the requirements of the ARINC 429 bus specification. The device translates incoming ARINC 429 signals to normal CMOS/TTL levels on each of its two independent receive channels. The HI-8482 is also functionally equivalent to the Fairchild/Raytheon RM3183.

HI-8482PSI

Abstract: HI-8482 HI-8482PST HI-8482CM-01 CERAMIC LEADLESS CHIP CARRIER package DPLC HI-6010 HI-8482J HI-8482JT HI-8683
Contextual Info: February 2001 GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS device designed as a dual differential line receiver in accordance with the requirements of the ARINC 429 bus specification. The device translates incoming ARINC 429 signals to normal CMOS/TTL levels on each of its two independent receive channels. The HI-8482 is also functionally equivalent to the Fairchild/Raytheon RM3183.

ic 7493 truth table

Abstract: HI-8482 HI-6010 HI-8482J HI-8482JT HI-8482PSI HI-8482PST HI-8683 RM3183 DS8482
Contextual Info: HI-8482 ARINC 429 Dual Line Receiver March 2007 OUT2A - 8 The HI-8482 line receiver is one of several options offered by Holt Integrated Circuits to interface to the ARINC bus. The digital data processing for serial-to-parallel conversion and clock recovery can be accomplished with the

HI-8482

Abstract: HI-8482CM-01 PCN0904 HI-8482SM-14
Contextual Info: 100mm to 150mm Wafer Conversion for HI-8482 Series of ARINC 429 Products Product Change Notice PCN0904 v1.0 September 10, 2012 Overview The purpose of this notice is to document the completed conversion of Holt devices manufactured using the 100mm 4.0um

HI-1574CDI

Abstract: HI1573CDM hi-1573cdm HI-8382CM-21 HI-3282CD 6010CM-10 QR-8050 HI-1573CDI
Contextual Info: New Assembly Supplier: Criteria Labs Austin, Texas Product Change Notice PCN0810 v1.0 December 02, 2008 Overview The purpose of this notice is to announce the addition of Criteria Labs in Austin, Texas as a qualified assembly supplier for ceramic side-brazed DIP package for both ARINC 429 and MIL-STD 1553 family of devices.

HI-8482

Contextual Info: HI-8482 HOLE INTEGRATED CIRCUITS ARINC 429 DUAL LINE RECEIVER PIN CONFIGURATIONS GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS de­ vice designed as a dual line receiver in accordance with the requirements of the ARINC 429 bus specification. It

HI-8482

Contextual Info: HI-8482 ARINC 429 DUAL LINE RECEIVER OUT2A - 8 The HI-8482 line receiver is one of several options offered by Holt Integrated Circuits to interface to the ARINC bus. The digital data processing for serial-to-parallel conversion and clock recovery can be accomplished with the

Contextual Info: December 1999 GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS device designed as a dual line receiver in accordance with the requirements of the ARINC 429 bus specification. It contains two independent ARINC receiver channels which accept differential input signals and converts them

HI-8482CM-01

Abstract: HI-8482 HI-8482PSI HI-6010 HI-8482J HI-8482JT HI-8482PST HI-8683 RM3183 DS8482
Contextual Info: HI-8482 ARINC 429 DUAL LINE RECEIVER OUT2A - 8 The HI-8482 line receiver is one of several options offered by Holt Integrated Circuits to interface to the ARINC bus. The digital data processing for serial-to-parallel conversion and clock recovery can be accomplished with the

HI-8482

Contextual Info: HI-8482 ARINC 429 DUAL LINE RECEIVER The self-test inputs force the outputs to either a ZERO, ONE, or NULL state for system tests. While in self-test mode, the ARINC inputs are ignored. IN2B - 4 OUT2B - 5 IN2A - 6 CAP2A - 7 OUT2A - 8 All the ARINC inputs have built-in hysteresis to reject

HI-8482

Abstract: 8482
Contextual Info: HI-8482 ARINC 429 DUAL LINE RECEIVER OUT2A - 8 The HI-8482 line receiver is one of several options offered by Holt Integrated Circuits to interface to the ARINC bus. The digital data processing for serial-to-parallel conversion and clock recovery can be accomplished with the

H1848

Contextual Info: HOLT, HI-8482 INTEGRATED CIRCUITS ARINC 429 DUAL LINE RECEIVER PIN CONFIGURATIONS GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS de­ vice designed as a dual line receiver in accordance with the requirements of the ARINC 429 bus specification. It